mirror of
https://gitee.com/dlmu-cone/bf_original_balance_chassis
synced 2026-07-24 19:47:44 +08:00
更新了CUBEMX配置,添加了所有引脚和外部中断.
This commit is contained in:
@@ -7,7 +7,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
@@ -26,6 +26,10 @@
|
||||
|
||||
SPI_HandleTypeDef hspi1;
|
||||
SPI_HandleTypeDef hspi2;
|
||||
DMA_HandleTypeDef hdma_spi1_rx;
|
||||
DMA_HandleTypeDef hdma_spi1_tx;
|
||||
DMA_HandleTypeDef hdma_spi2_rx;
|
||||
DMA_HandleTypeDef hdma_spi2_tx;
|
||||
|
||||
/* SPI1 init function */
|
||||
void MX_SPI1_Init(void)
|
||||
@@ -125,6 +129,49 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* SPI1 DMA Init */
|
||||
/* SPI1_RX Init */
|
||||
hdma_spi1_rx.Instance = DMA2_Stream0;
|
||||
hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3;
|
||||
hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi1_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||
hdma_spi1_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
hdma_spi1_rx.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
hdma_spi1_rx.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmarx,hdma_spi1_rx);
|
||||
|
||||
/* SPI1_TX Init */
|
||||
hdma_spi1_tx.Instance = DMA2_Stream3;
|
||||
hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3;
|
||||
hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi1_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmatx,hdma_spi1_tx);
|
||||
|
||||
/* SPI1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(SPI1_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(SPI1_IRQn);
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
@@ -150,6 +197,52 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* SPI2 DMA Init */
|
||||
/* SPI2_RX Init */
|
||||
hdma_spi2_rx.Instance = DMA1_Stream3;
|
||||
hdma_spi2_rx.Init.Channel = DMA_CHANNEL_0;
|
||||
hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi2_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi2_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi2_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||
hdma_spi2_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
hdma_spi2_rx.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
hdma_spi2_rx.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
if (HAL_DMA_Init(&hdma_spi2_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmarx,hdma_spi2_rx);
|
||||
|
||||
/* SPI2_TX Init */
|
||||
hdma_spi2_tx.Instance = DMA1_Stream4;
|
||||
hdma_spi2_tx.Init.Channel = DMA_CHANNEL_0;
|
||||
hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi2_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi2_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||
hdma_spi2_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
hdma_spi2_tx.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
hdma_spi2_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx);
|
||||
|
||||
/* SPI2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(SPI2_IRQn);
|
||||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspInit 1 */
|
||||
@@ -176,6 +269,12 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
||||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_7);
|
||||
|
||||
/* SPI1 DMA DeInit */
|
||||
HAL_DMA_DeInit(spiHandle->hdmarx);
|
||||
HAL_DMA_DeInit(spiHandle->hdmatx);
|
||||
|
||||
/* SPI1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(SPI1_IRQn);
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
@@ -195,6 +294,12 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
|
||||
|
||||
/* SPI2 DMA DeInit */
|
||||
HAL_DMA_DeInit(spiHandle->hdmarx);
|
||||
HAL_DMA_DeInit(spiHandle->hdmatx);
|
||||
|
||||
/* SPI2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(SPI2_IRQn);
|
||||
/* USER CODE BEGIN SPI2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspDeInit 1 */
|
||||
|
||||
Reference in New Issue
Block a user