From 9ea9ddf31026d028219be71750d7d4c22da728d6 Mon Sep 17 00:00:00 2001
From: TuxMonkey <8196772+tuxmonkey@user.noreply.gitee.com>
Date: Mon, 20 Jul 2026 16:41:16 +0800
Subject: [PATCH] ioc changed hard spi tft

---
 Core/Src/spi.c                    |  8 ++++----
 TronOneH7_Scaffold.ioc            | 12 +++++++++---
 User_Code/module/periph/tft/tft.c | 13 +++++++++++++
 User_Code/module/periph/tft/tft.h |  3 ++-
 4 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/Core/Src/spi.c b/Core/Src/spi.c
index 30d477c..cc178e1 100644
--- a/Core/Src/spi.c
+++ b/Core/Src/spi.c
@@ -44,12 +44,12 @@ void MX_SPI1_Init(void)
   /* USER CODE END SPI1_Init 1 */
   hspi1.Instance = SPI1;
   hspi1.Init.Mode = SPI_MODE_MASTER;
-  hspi1.Init.Direction = SPI_DIRECTION_2LINES_TXONLY;
+  hspi1.Init.Direction = SPI_DIRECTION_2LINES;
   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
   hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
   hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
   hspi1.Init.NSS = SPI_NSS_SOFT;
-  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
+  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
@@ -149,14 +149,14 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
     GPIO_InitStruct.Pin = GPIO_PIN_7;
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
     GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
     GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
     HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 
     GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4;
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
     GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
     GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
diff --git a/TronOneH7_Scaffold.ioc b/TronOneH7_Scaffold.ioc
index 3bfe05c..fc0ddf1 100644
--- a/TronOneH7_Scaffold.ioc
+++ b/TronOneH7_Scaffold.ioc
@@ -653,9 +653,13 @@ PB13.Locked=true
 PB13.Mode=Full_Duplex_Master
 PB13.Signal=SPI2_SCK
 PB15.Signal=S_TIM12_CH2
+PB3(JTDO/TRACESWO).GPIOParameters=GPIO_Speed
+PB3(JTDO/TRACESWO).GPIO_Speed=GPIO_SPEED_FREQ_HIGH
 PB3(JTDO/TRACESWO).Locked=true
 PB3(JTDO/TRACESWO).Mode=Full_Duplex_Master
 PB3(JTDO/TRACESWO).Signal=SPI1_SCK
+PB4(NJTRST).GPIOParameters=GPIO_Speed
+PB4(NJTRST).GPIO_Speed=GPIO_SPEED_FREQ_HIGH
 PB4(NJTRST).Locked=true
 PB4(NJTRST).Mode=Full_Duplex_Master
 PB4(NJTRST).Signal=SPI1_MISO
@@ -736,6 +740,8 @@ PD5.Signal=USART2_TX
 PD6.Locked=true
 PD6.Mode=Asynchronous
 PD6.Signal=USART2_RX
+PD7.GPIOParameters=GPIO_Speed
+PD7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
 PD7.Locked=true
 PD7.Mode=Full_Duplex_Master
 PD7.Signal=SPI1_MOSI
@@ -914,11 +920,11 @@ SH.S_TIM3_CH4.ConfNb=1
 SH.SharedStack_PC12.0=SPI3_MOSI
 SH.SharedStack_PC12.1=UART5_TX,Asynchronous
 SH.SharedStack_PC12.ConfNb=2
-SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
+SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_16
 SPI1.CLKPolarity=SPI_POLARITY_LOW
-SPI1.CalculateBaudRate=15.0 MBits/s
+SPI1.CalculateBaudRate=7.5 MBits/s
 SPI1.DataSize=SPI_DATASIZE_8BIT
-SPI1.Direction=SPI_DIRECTION_2LINES_TXONLY
+SPI1.Direction=SPI_DIRECTION_2LINES
 SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler,CLKPolarity
 SPI1.Mode=SPI_MODE_MASTER
 SPI1.VirtualType=VM_MASTER
diff --git a/User_Code/module/periph/tft/tft.c b/User_Code/module/periph/tft/tft.c
index 1cd5624..516d4d2 100644
--- a/User_Code/module/periph/tft/tft.c
+++ b/User_Code/module/periph/tft/tft.c
@@ -158,6 +158,18 @@ static void tft_write_bytes(const uint8_t *data, uint32_t len)
 #else
     while (len > 0U)
     {
+#if TFT_HW_SPI_BYTE_MODE && TFT_HW_SPI_PULSE_CS
+        tft_cs_low();
+        if (HAL_SPI_Transmit(&TFT_SPI_UNIT, (uint8_t *) data, 1U, TFT_SPI_TIMEOUT_MS) != HAL_OK)
+        {
+            tft_transfer_ok = false;
+            tft_cs_high();
+            return;
+        }
+        tft_cs_high();
+        data++;
+        len--;
+#else
 #if TFT_HW_SPI_BYTE_MODE
         uint16_t chunk = 1U;
 #else
@@ -171,6 +183,7 @@ static void tft_write_bytes(const uint8_t *data, uint32_t len)
         }
         data += chunk;
         len -= chunk;
+#endif
     }
 #endif
 }
diff --git a/User_Code/module/periph/tft/tft.h b/User_Code/module/periph/tft/tft.h
index 16e556f..85f90a4 100644
--- a/User_Code/module/periph/tft/tft.h
+++ b/User_Code/module/periph/tft/tft.h
@@ -11,8 +11,9 @@ extern "C" {
 #endif
 
 #define TFT_USE_HORIZONTAL   2U
-#define TFT_USE_SOFT_SPI     1U
+#define TFT_USE_SOFT_SPI     0U
 #define TFT_HW_SPI_BYTE_MODE 1U
+#define TFT_HW_SPI_PULSE_CS  1U
 
 #if (TFT_USE_HORIZONTAL == 0U) || (TFT_USE_HORIZONTAL == 1U)
 #define TFT_LCD_W 240U