TuxMonkey/tronone-h7-scaffold
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closed fucking IWDG and SPI WS2812 is running

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TuxMonkey
2025-11-07 16:17:18 +08:00
parent 9dddb18932
commit bf787d97b4
12 changed files with 62 additions and 1039 deletions
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6
Core/Inc/FreeRTOSConfig.h
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@@ -67,8 +67,8 @@
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)25600)
#define configMINIMAL_STACK_SIZE ((uint16_t)256)
#define configTOTAL_HEAP_SIZE ((size_t)30720)
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
@@ -93,7 +93,7 @@
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( 2 )
#define configTIMER_QUEUE_LENGTH 10
#define configTIMER_TASK_STACK_DEPTH 256
#define configTIMER_TASK_STACK_DEPTH 512
/* CMSIS-RTOS V2 flags */
#define configUSE_OS2_THREAD_SUSPEND_RESUME 1

52
Core/Inc/iwdg.h
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@@ -1,52 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file iwdg.h
* @brief This file contains all the function prototypes for
* the iwdg.c file
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __IWDG_H__
#define __IWDG_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern IWDG_HandleTypeDef hiwdg1;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_IWDG1_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __IWDG_H__ */

2
Core/Inc/stm32h7xx_hal_conf.h
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@@ -61,7 +61,7 @@
/* #define HAL_OSPI_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */

4
Core/Src/freertos.c
View File

@@ -107,8 +107,8 @@ const osThreadAttr_t reference_attributes = {
osThreadId_t WS2812TaskHandle;
const osThreadAttr_t WS2812Task_attributes = {
.name = "WS2812Task",
.stack_size = 128 * 4,
.priority = (osPriority_t) osPriorityLow,
.stack_size = 256 * 4,
.priority = (osPriority_t) osPriorityBelowNormal,
};
/* Private function prototypes -----------------------------------------------*/

56
Core/Src/iwdg.c
View File

@@ -1,56 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file iwdg.c
* @brief This file provides code for the configuration
* of the IWDG instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "iwdg.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
IWDG_HandleTypeDef hiwdg1;
/* IWDG1 init function */
void MX_IWDG1_Init(void)
{
/* USER CODE BEGIN IWDG1_Init 0 */
/* USER CODE END IWDG1_Init 0 */
/* USER CODE BEGIN IWDG1_Init 1 */
/* USER CODE END IWDG1_Init 1 */
hiwdg1.Instance = IWDG1;
hiwdg1.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg1.Init.Window = 4095;
hiwdg1.Init.Reload = 4095;
if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG1_Init 2 */
/* USER CODE END IWDG1_Init 2 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

5
Core/Src/main.c
View File

@@ -23,7 +23,6 @@
#include "crc.h"
#include "dma.h"
#include "fdcan.h"
#include "iwdg.h"
#include "spi.h"
#include "tim.h"
#include "usart.h"
@@ -126,7 +125,6 @@ int main(void)
MX_SPI1_Init();
MX_UART5_Init();
MX_TIM3_Init();
MX_IWDG1_Init();
MX_SPI6_Init();
/* USER CODE BEGIN 2 */
@@ -175,11 +173,10 @@ void SystemClock_Config(void)
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI
|RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = 64;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;