131 Commits
v0.1 ... v0.2

Author SHA1 Message Date
75f7c3defd add ffc controller 2026-02-12 01:12:05 +08:00
8458a4ffe7 add ffc controller 2026-02-12 01:03:41 +08:00
8f22f67c5a add ffc controller 2026-02-12 01:02:48 +08:00
b00cfac6f6 add ffc controller 2026-02-12 01:01:24 +08:00
d27b8e8473 add ffc controller 2026-02-12 00:59:13 +08:00
a025289597 add ffc controller 2026-02-12 00:41:34 +08:00
f94b76b982 change CMakeLists.txt 2026-02-11 23:35:13 +08:00
3704e1c689 change includes 2026-02-11 23:15:18 +08:00
9628c1eae0 user ozone config 2026-02-11 22:55:09 +08:00
de9b19b72d cmakelist 2026-02-11 15:59:17 +08:00
d2b7acd3d4 cmakelist 2026-02-11 15:56:03 +08:00
19278fa68f add docs 2026-02-11 15:47:17 +08:00
55d36d3812 add imu deadbands to prevent 0piao 2026-02-11 00:27:51 +08:00
4ec7340bc4 update cmakelists 2026-02-10 23:08:25 +08:00
86650fd2bd update cmakelists 2026-02-10 21:56:01 +08:00
f27dad8242 update cmakelists 2026-02-10 16:55:51 +08:00
1059a007a2 add readme.md 2026-02-10 16:36:25 +08:00
85e5c7d6a0 add readme.md 2026-02-10 16:29:30 +08:00
TuxMonkey
bda8bf1b43 spring 2026-01-17 17:51:35 +08:00
TuxMonkey
c6a0c3f0cc spring 2026-01-17 17:48:42 +08:00
93abe2381f changed bspfdcan 2026-01-09 03:05:55 +08:00
TuxMonkey
59e545e3f2 servo init 2025-12-25 21:31:04 +08:00
TuxMonkey
2ea642d04a servo init 2025-12-24 14:11:50 +08:00
TuxMonkey
f92289346d remote control init 2025-12-18 19:05:50 +08:00
TuxMonkey
8c66f57642 remote control init 2025-12-18 19:05:05 +08:00
TuxMonkey
987c402751 remote control init 2025-12-15 21:59:29 +08:00
TuxMonkey
a78fe6ea11 remote control init 2025-12-15 21:31:36 +08:00
TuxMonkey
2d905efeb7 videotransmiter 2025-12-05 22:03:47 +08:00
8ce7e064e8 Revert "message hub"
This reverts commit 7522bc9974.
2025-12-05 14:02:31 +00:00
TuxMonkey
ec509f0bf1 videotransmiter 2025-12-05 21:57:41 +08:00
TuxMonkey
c021b4794c videotransmiter 2025-12-05 21:47:00 +08:00
TuxMonkey
7522bc9974 message hub 2025-12-04 21:32:17 +08:00
TuxMonkey
80dd342a18 message hub 2025-12-02 22:05:51 +08:00
TuxMonkey
74a2ded88a bsp docs 2025-12-01 20:28:11 +08:00
TuxMonkey
0da5af5742 bsp docs 2025-11-25 14:56:22 +08:00
TuxMonkey
2c7c458769 bsp_flash 2025-11-25 14:55:34 +08:00
TuxMonkey
c1ebb09358 代码规范 usbvpc文档 2025-11-25 14:40:40 +08:00
TuxMonkey
72e8500a27 代码规范 usart文档 2025-11-25 14:28:03 +08:00
TuxMonkey
2a40c85a2b 代码规范 prts文档 2025-11-25 14:24:06 +08:00
TuxMonkey
a57f882fc3 代码规范 prts文档 2025-11-25 13:01:39 +08:00
TuxMonkey
e664bca77b 代码规范 prts文档 2025-11-24 15:27:46 +08:00
TuxMonkey
4bfdd87bab 代码规范 SuperCap文档 2025-11-24 14:58:44 +08:00
TuxMonkey
d23a73e4bf 代码规范 SuperCap文档 2025-11-24 14:54:15 +08:00
TuxMonkey
eb9ecf9c12 代码规范 SuperCap文档 2025-11-24 14:53:41 +08:00
TuxMonkey
262cff7d16 代码规范 SuperCap文档 2025-11-24 14:39:28 +08:00
TuxMonkey
41648fe75f 代码规范 2025-11-24 14:30:24 +08:00
TuxMonkey
d97528291a 代码规范 2025-11-20 19:49:12 +08:00
TuxMonkey
1ff64dea82 代码规范 2025-11-20 19:26:42 +08:00
TuxMonkey
d49c023f3c powermeter 2025-11-20 19:19:10 +08:00
TuxMonkey
8d88556f5f powermeter 2025-11-20 19:11:56 +08:00
TuxMonkey
bc248a88f7 adc 2025-11-20 17:37:07 +08:00
TuxMonkey
a5428702d7 adc 2025-11-20 17:19:43 +08:00
TuxMonkey
a46ac6e1d8 ld file 2025-11-20 15:33:09 +08:00
TuxMonkey
922370eeec ld file 2025-11-20 15:18:50 +08:00
TuxMonkey
69f6a4f799 add damiao imu module 2025-11-20 15:12:20 +08:00
TuxMonkey
d5185b491a add damiao imu module 2025-11-18 13:06:23 +08:00
TuxMonkey
3d73aeea5d add damiao imu module 2025-11-18 13:03:52 +08:00
TuxMonkey
bed78b6505 add some new md 2025-11-17 16:43:02 +08:00
TuxMonkey
56639afc18 add some new modules 2025-11-17 16:27:19 +08:00
TuxMonkey
d1e7f30373 add new drv but not benefit stm32h723vg 2025-11-16 22:08:58 +08:00
TuxMonkey
e08ffe766f add new drv but not benefit stm32h723vg 2025-11-16 21:37:51 +08:00
TuxMonkey
977f266a42 release bmi088 to dwt delay 2025-11-16 21:05:23 +08:00
TuxMonkey
38264c53e1 release bmi088 to dwt delay 2025-11-16 21:05:10 +08:00
TuxMonkey
66da7a1935 math lib ok(?) but not linked to lib 2025-11-16 20:55:29 +08:00
TuxMonkey
053563e951 math lib failure 2025-11-16 17:42:34 +08:00
TuxMonkey
ab01747052 imu test 2025-11-16 17:19:14 +08:00
TuxMonkey
de8a0d5117 imu test failed 2025-11-15 22:18:00 +08:00
TuxMonkey
14a3cbb955 为什么要演奏春日影 2025-11-15 20:52:09 +08:00
TuxMonkey
1a0484b332 format 2025-11-15 16:27:25 +08:00
TuxMonkey
b98674ac3f format 2025-11-15 16:13:35 +08:00
TuxMonkey
7c0273c80c format 2025-11-15 15:57:21 +08:00
TuxMonkey
71e9329709 linux armnoneeabigcc 2025-11-15 15:55:05 +08:00
TuxMonkey
0f85356b7d linux armnoneeabigcc 2025-11-15 15:22:57 +08:00
TuxMonkey
0ee14e9b47 buzzer ok (because rtos not start cant read ticks) 2025-11-15 15:21:02 +08:00
TuxMonkey
39c4551d1f buzzer ok (because rtos not start cant read ticks) 2025-11-15 15:16:47 +08:00
TuxMonkey
287cec0e84 buzzer ok (because rtos not start cant read ticks) 2025-11-14 21:42:22 +08:00
TuxMonkey
190921dc76 buzzer ok (because rtos not start cant read ticks) 2025-11-12 21:12:28 +08:00
TuxMonkey
9f205d6252 buzzer problem not ok 2025-11-11 21:46:38 +08:00
TuxMonkey
82f21f7d35 buzzer problem not ok 2025-11-11 21:46:23 +08:00
miss
9aac6aca4d changed default toolchain to arm-none-eabi 2025-11-11 20:58:22 +08:00
miss
6bd8f0c5c3 changed default toolchain to arm-none-eabi 2025-11-11 20:56:04 +08:00
miss
f06946af8c changed to have breakpoints 2025-11-11 20:51:46 +08:00
TuxMonkey
b266f8d4dd interwork problem 2025-11-11 20:31:11 +08:00
f8f3c229d8 add LICENSE.
Signed-off-by: TuxMonkey <nqx_2004@qq.com>
2025-11-11 07:59:12 +00:00
tux
cdf7d35259 format 2025-11-11 15:48:30 +08:00
tux
ee44ce8979 add first commit to modules/periph/buzzer 2025-11-11 15:32:53 +08:00
tux
a3eed14110 add commit to ld files 2025-11-11 15:22:07 +08:00
tux
0f5a3b51c4 add commit to cmake files 2025-11-11 15:18:39 +08:00
tux
d252e8b178 add commit to cmake files 2025-11-11 15:16:06 +08:00
tux
99568ff0bb add commit to Compile Options 2025-11-11 15:10:46 +08:00
tux
43678bf009 auto detect toolchain 2025-11-11 15:08:14 +08:00
tux
3143b12248 auto detect toolchain 2025-11-11 15:04:05 +08:00
tux
1554fcf449 auto detect toolchain 2025-11-11 14:26:15 +08:00
tux
44f890a6cb auto detect toolchain 2025-11-11 14:13:18 +08:00
TuxMonkey
4f13aff020 changed cmakelist and pending rpl lib to fix 2025-11-10 21:43:32 +08:00
eb122d0898 changed readme.md 2025-11-10 20:17:58 +08:00
d27518d189 !2 添加starm-clang和arm-none-eabi工具链检测逻辑,移除CMakePresets.json
Merge pull request !2 from 120MF/master
2025-11-10 11:40:48 +00:00
WeaveFeather
c49665cedc 添加starm-clang和arm-none-eabi工具链检测逻辑,移除CMakePresets.json 2025-11-10 19:36:02 +08:00
f4f131803f add linux db2 2025-11-10 18:28:52 +08:00
c736e3060c !1 添加 CMake 支持以自动查找和链接 rpl 库,并创建 CMake 构建说明文档
Merge pull request !1 from 120MF/master
2025-11-10 10:07:34 +00:00
MoonFeather
ed07d3659f 添加 CMake 支持以自动查找和链接 rpl 库,并创建 CMake 构建说明文档
Signed-off-by: MoonFeather <moonbite233@gmail.com>
2025-11-10 16:30:07 +08:00
MoonFeather
0e1c9cbbc1 自动添加User_Code下的源文件/包含目录
Signed-off-by: MoonFeather <moonbite233@gmail.com>
2025-11-10 15:59:47 +08:00
MoonFeather
e82cca9692 模块化主CMakeLists内容到cmake子目录
Signed-off-by: MoonFeather <moonbite233@gmail.com>
2025-11-10 15:54:11 +08:00
MoonFeather
deaefab9c3 停止追踪.idea,去除CMakeLists中多余内容 2025-11-10 15:46:49 +08:00
TuxMonkey
e8a55af06a add module-buzzer 2025-11-09 21:56:44 +08:00
fbedc008ef closed fucking IWDG and SPI WS2812 is running 2025-11-07 16:18:31 +08:00
bf787d97b4 closed fucking IWDG and SPI WS2812 is running 2025-11-07 16:17:18 +08:00
9dddb18932 add linux debug 2025-11-07 15:37:04 +08:00
TuxMonkey
99ad2328a3 push dedebfiles 2025-11-06 22:20:02 +08:00
tux
ac14e19828 updated ioc but not ok 2025-11-05 23:06:07 +08:00
TuxMonkey
2dbfa43588 must need stm32cubeclt to have breakpoint? 2025-11-05 21:16:46 +08:00
TuxMonkey
9dff60f9ae changed starm-clang.cmake
gcc-arm-none-eabi.cmake to have -O0-g
2025-11-05 20:44:10 +08:00
tux
dcc4e38451 updated powercontrol 2025-11-05 17:52:11 +08:00
tux
4a00b40821 updated readme.md 2025-11-05 15:10:43 +08:00
tux
9d0b8c49f7 fix ws2812Task void *argument issue 2025-11-05 15:04:29 +08:00
tux
3b3e6c764f add spi6 2025-11-05 15:01:47 +08:00
TuxMonkey
f51fe3cc4e error 2025-11-04 22:13:49 +08:00
TuxMonkey
d744034f45 changed add ws2812Task 2025-11-04 22:07:56 +08:00
TuxMonkey
cdc462789f add bsp_spi 2025-11-04 22:02:49 +08:00
TuxMonkey
183cc81446 add ws2812task 2025-11-03 22:14:44 +08:00
TuxMonkey
7a113a32dd add bsp_spi 2025-11-03 22:08:14 +08:00
38ecee9603 changed file and directory 2025-10-28 14:57:41 +08:00
95e8f8b623 changed file and directory 2025-10-28 14:52:24 +08:00
9658cd656e added fdcan.c/fdcan.h document markdown 2025-10-26 15:37:14 +08:00
9bffbabeac changed bsp_fdcan.c/bsp_fdcan.h 2025-10-26 13:39:49 +08:00
2cd749a652 changed fdcan.c 2025-10-26 13:26:30 +08:00
2f5e60e86c add bsp_fdcan.c/.h 2025-10-24 15:44:40 +08:00
faca03ab2a add bsp_fdcan.c/.h 2025-10-24 15:30:40 +08:00
bd6bd124fa changed CMakeLists.txt
add some refs
2025-10-24 15:09:49 +08:00
dfd5692c86 changed CMakeLists.txt
add some refs
2025-10-24 15:09:03 +08:00
239c7eca91 changed CMakeLists.txt
add some refs
2025-10-21 17:09:46 +08:00
271 changed files with 45470 additions and 2095 deletions

55
.clang-format Normal file
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@@ -0,0 +1,55 @@
---
Language: Cpp
BasedOnStyle: Microsoft
AccessModifierOffset: -4
AlignConsecutiveAssignments: false
AlignConsecutiveDeclarations: false
AlignOperands: true
AlignTrailingComments: false
AllowShortBlocksOnASingleLine: false
AlwaysBreakTemplateDeclarations: Yes
BraceWrapping:
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BeforeWhile: true
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SplitEmptyRecord: true
SplitEmptyNamespace: true
BreakConstructorInitializers: AfterColon
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IncludeCategories:
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Priority: 1
- Regex: '^".*'
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SpacesInCStyleCastParentheses: false
SpacesInParentheses: false
...

4
.gitignore vendored
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@@ -13,3 +13,7 @@ cmake-build-debug-stm32cube
/STM32H723VGTx_FLASH.ld /STM32H723VGTx_FLASH.ld
/compile_commands.json /compile_commands.json
.idea
cmake-build*

8
.idea/.gitignore generated vendored
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@@ -1,8 +0,0 @@
# 默认忽略的文件
/shelf/
/workspace.xml
# 基于编辑器的 HTTP 客户端请求
/httpRequests/
# Datasource local storage ignored files
/dataSources/
/dataSources.local.xml

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@@ -1,2 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<module classpath="CMake" type="CPP_MODULE" version="4" />

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@@ -1,6 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<project version="4">
<component name="AgentMigrationStateService">
<option name="migrationStatus" value="COMPLETED" />
</component>
</project>

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@@ -1,6 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<project version="4">
<component name="AskMigrationStateService">
<option name="migrationStatus" value="COMPLETED" />
</component>
</project>

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@@ -1,6 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<project version="4">
<component name="Ask2AgentMigrationStateService">
<option name="migrationStatus" value="COMPLETED" />
</component>
</project>

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@@ -1,6 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<project version="4">
<component name="EditMigrationStateService">
<option name="migrationStatus" value="COMPLETED" />
</component>
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252
.idea/editor.xml generated
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@@ -1,252 +0,0 @@
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<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUnionMemberOfReferenceType/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUnmatchedPragmaEndRegionDirective/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUnmatchedPragmaRegionDirective/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUnnamedNamespaceInHeaderFile/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUnnecessaryWhitespace/@EntryIndexedValue" value="DO_NOT_SHOW" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUnsignedZeroComparison/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUnusedIncludeDirective/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseAlgorithmWithCount/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseAssociativeContains/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseAuto/@EntryIndexedValue" value="HINT" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseAutoForNumeric/@EntryIndexedValue" value="HINT" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseElementsView/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseEraseAlgorithm/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseFamiliarTemplateSyntaxForGenericLambdas/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseRangeAlgorithm/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseStdSize/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseStructuredBinding/@EntryIndexedValue" value="HINT" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUseTypeTraitAlias/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUserDefinedLiteralSuffixDoesNotStartWithUnderscore/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppUsingResultOfAssignmentAsCondition/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppVariableCanBeMadeConstexpr/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppVirtualFunctionCallInsideCtor/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppVirtualFunctionInFinalClass/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppVolatileParameterInDeclaration/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppWarningDirective/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppWrongIncludesOrder/@EntryIndexedValue" value="HINT" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppWrongSlashesInIncludeDirective/@EntryIndexedValue" value="HINT" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppZeroConstantCanBeReplacedWithNullptr/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=CppZeroValuedExpressionUsedAsNullPointer/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=IdentifierTypo/@EntryIndexedValue" value="DO_NOT_SHOW" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=IfStdIsConstantEvaluatedCanBeReplaced/@EntryIndexedValue" value="SUGGESTION" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=StdIsConstantEvaluatedWillAlwaysEvaluateToConstant/@EntryIndexedValue" value="WARNING" type="string" />
<option name="/Default/CodeInspection/Highlighting/InspectionSeverities/=StringLiteralTypo/@EntryIndexedValue" value="DO_NOT_SHOW" type="string" />
</component>
</project>

14
.idea/misc.xml generated
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@@ -1,14 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<project version="4">
<component name="CMakePythonSetting">
<option name="pythonIntegrationState" value="YES" />
</component>
<component name="CMakeWorkspace" PROJECT_DIR="$PROJECT_DIR$" />
<component name="MaterialThemeProjectNewConfig">
<option name="metadata">
<MTProjectMetadataState>
<option name="userId" value="-4755b0c8:1993c71e271:-7fed" />
</MTProjectMetadataState>
</option>
</component>
</project>

File diff suppressed because one or more lines are too long

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@@ -1,68 +1,298 @@
# ==============================================================================
# 大连民族大学创一工作室 达妙开发板脚手架-CMake构建系统
# ==============================================================================
cmake_minimum_required(VERSION 3.22) cmake_minimum_required(VERSION 3.22)
# #欢迎提示
# This file is generated only once, message(NOTICE ">> 欢迎使用创一工作室达妙开发板脚手架的CMake构建系统")
# and is not re-generated if converter is called multiple times. message(NOTICE ">> 如报错信息为未安装环境或找不到可用编译器请先安装STM32CubeCLT可以在ST官网找到下载链接 https://www.st.com/en/development-tools/stm32cubeclt.html")
# message(NOTICE ">> 安装完STM32CubeCLT后记得重启刷新编译器环境变量或自己添加到环境变量PATH中")
# User is free to modify the file as much as necessary message(NOTICE ">> 如使用Makefile需要自己添加Make构建工具的环境变量网上搜一搜教程都有的")
# message(NOTICE ">> 本项目默认使用arm-none-eabi-gcc如需使用starm-clang请注意编译优化设置截止发布前暂无法使用starm-clang构建的elf进行debug无法打断点")
# Setup compiler settings # ------------------------------------------------------------------------------
# 1. 机器人兵种选择开关 (Robot Configuration)
# 请将当前需要编译的机器人设置为 ON其余保持 OFF
# ------------------------------------------------------------------------------
option(INFANTRY_MEC "1. 麦轮步兵 (Mecanum Infantry)" OFF)
option(INFANTRY_HALF_STEER "2. 半舵步兵 (Half-Steer Infantry)" OFF)
option(HERO_MEC "3. 麦轮英雄 (Mecanum Hero)" OFF)
option(SENTRY_STEER "4. 舵轮哨兵 (Steer Sentry)" OFF)
option(INFANTRY_TRANSFORM "5. 变形步兵 (Transformable Infantry)" OFF)
option(BALANCE_SERIAL "6. 串联腿平衡步兵 (Serial-Leg Balance)" OFF)
option(BALANCE_PARALLEL "7. 并联腿平衡步兵 (Parallel-Leg Balance)" OFF)
option(DART "8. 飞镖架 (Dart System)" OFF)
option(DEV_DEBUG "9. 调试模式 (Debug Mode)" ON)
# ------------------------------------------------------------------------------
# 2. 安全互斥检查 (Safety Check)
# ------------------------------------------------------------------------------
set(ROBOT_ENABLE_COUNT 0)
if(INFANTRY_MEC)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(INFANTRY_HALF_STEER)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(HERO_MEC)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(SENTRY_STEER)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(INFANTRY_TRANSFORM)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(BALANCE_SERIAL)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(BALANCE_PARALLEL)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(DART)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(DEV_DEBUG)
math(EXPR ROBOT_ENABLE_COUNT "${ROBOT_ENABLE_COUNT}+1")
endif()
if(ROBOT_ENABLE_COUNT GREATER 1)
message(FATAL_ERROR "【错误】检测到同时开启了 ${ROBOT_ENABLE_COUNT} 个兵种!请检查 option 设置,确保只有一个为 ON。")
elseif(ROBOT_ENABLE_COUNT EQUAL 0)
message(WARNING "【警告】未选择任何兵种!将仅编译通用库,无法生成有效固件。")
endif()
# ------------------------------------------------------------------------------
# 3. 基础项目配置 (Project Setup)
# ------------------------------------------------------------------------------
include(cmake/DetectToolchain.cmake)
project(TronOneH7_Scaffold)
list(APPEND CMAKE_MODULE_PATH ${PROJECT_SOURCE_DIR}/cmake)
set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
enable_language(C CXX ASM)
# 标准设置 (C23 / C++23)
set(CMAKE_C_STANDARD 23) set(CMAKE_C_STANDARD 23)
set(CMAKE_C_STANDARD_REQUIRED ON) set(CMAKE_C_STANDARD_REQUIRED ON)
set(CMAKE_C_EXTENSIONS ON) set(CMAKE_C_EXTENSIONS ON)
set(CMAKE_CXX_STANDARD 23)
set(CMAKE_CXX_STANDARD_REQUIRED ON)
set(CMAKE_CXX_EXTENSIONS ON)
# Define the build type #标准提示
if(NOT CMAKE_BUILD_TYPE) message(NOTICE ">> 本项目使用 C ${CMAKE_C_STANDARD} 及 C++ ${CMAKE_CXX_STANDARD} 标准")
# 根据构建类型设置不同的编译选项
if (CMAKE_BUILD_TYPE STREQUAL "Debug")
set(CMAKE_C_FLAGS_DEBUG "-O0 -g") # 调试模式:无优化,包含调试信息
set(CMAKE_CXX_FLAGS_DEBUG "-O0 -g")
elseif (CMAKE_BUILD_TYPE STREQUAL "Release")
set(CMAKE_C_FLAGS_RELEASE "-O3") # 发布模式:最高级别优化
set(CMAKE_CXX_FLAGS_RELEASE "-O3")
elseif (CMAKE_BUILD_TYPE STREQUAL "RelWithDebInfo")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "-O2 -g") # 带调试信息的发布模式:中等优化,包含调试信息
set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "-O2 -g")
elseif (CMAKE_BUILD_TYPE STREQUAL "MinSizeRel")
set(CMAKE_C_FLAGS_MINSIZEREL "-Os") # 最小体积模式:优化代码大小
set(CMAKE_CXX_FLAGS_MINSIZEREL "-Os")
endif ()
# 输出编译器路径
message(NOTICE ">> [Assembler] 找到的 C 编译器路径: ${CMAKE_C_COMPILER}")
message(NOTICE ">> [Assembler] 找到的 C++ 编译器路径: ${CMAKE_CXX_COMPILER}")
if (NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE "Debug") set(CMAKE_BUILD_TYPE "Debug")
endif() endif ()
# Set the project name # 编译器标志
set(CMAKE_PROJECT_NAME TronOneH7_Scaffold) set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -frtti -Wno-volatile")
# Enable compile command to ease indexing with e.g. clangd message(NOTICE ">> [Build Type] 当前构建类型: ${CMAKE_BUILD_TYPE}")
set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
# Core project settings # ------------------------------------------------------------------------------
project(${CMAKE_PROJECT_NAME}) # 4. 目标与库链接 (Target & Libraries)
message("Build type: " ${CMAKE_BUILD_TYPE}) # ------------------------------------------------------------------------------
# Enable CMake support for ASM and C languages
enable_language(C ASM)
# Create an executable object type
add_executable(${CMAKE_PROJECT_NAME}) add_executable(${CMAKE_PROJECT_NAME})
# Add STM32CubeMX generated sources include(CompileOptions)
# FindModules
# 只有运行了这个CMake 才会去执行 git clone 云端modules 并配置它的路径
include(FindModules)
# 添加 STM32CubeMX 底层库
add_subdirectory(cmake/stm32cubemx) add_subdirectory(cmake/stm32cubemx)
# Link directories setup # 链接库
target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined library search paths
)
# Add sources to executable
target_sources(${CMAKE_PROJECT_NAME} PRIVATE
# Add user sources here
)
# Add include paths
target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined include paths
)
# Add project symbols (macros)
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined symbols
)
# Remove wrong libob.a library dependency when using cpp files
list(REMOVE_ITEM CMAKE_C_IMPLICIT_LINK_LIBRARIES ob)
# Add linked libraries
target_link_libraries(${CMAKE_PROJECT_NAME} target_link_libraries(${CMAKE_PROJECT_NAME}
stm32cubemx stm32cubemx
# 因为 ems 是通过 FindModules 下载的外部库,不在 User_Code 里。
# Add user defined libraries # 链接这个库会自动把 ems 的头文件路径加入到工程里。
ems
${CMAKE_SOURCE_DIR}/Drivers/CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a
)
link_libraries("Drivers/CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a")
include_directories(
./Drivers/CMSIS/Include
./Drivers/CMSIS/DSP/Include/
)
link_directories(
./Drivers/CMSIS/DSP/Lib/GCC
)
# ==============================================================================
# 5. 源码与头文件管理 (Source & Header Management)
# ==============================================================================
# ------------------------------------------------------------------------------
# A. 头文件管理:全自动模式,扫描 User_Code 下的所有头文件。
# ------------------------------------------------------------------------------
message(NOTICE ">> [Searching All Header] 正在全自动递归扫描 User_Code 下所有头文件路径...")
file(GLOB_RECURSE USER_HEADERS "${CMAKE_SOURCE_DIR}/User_Code/*.h" "${CMAKE_SOURCE_DIR}/User_Code/*.hpp")
foreach (header ${USER_HEADERS})
get_filename_component(dir ${header} DIRECTORY) # 获取头文件所在目录
target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE ${dir}) # 添加为私有包含目录
endforeach ()
# ------------------------------------------------------------------------------
# B. 源文件管理:半自动模式 (防止兵种冲突)
# 通用部分全自动扫描,特定兵种部分根据开关选择性扫描。
# ------------------------------------------------------------------------------
message(NOTICE ">> [INFO] 正在全自动递归扫描 User_Code/bsp下所有源文件路径...")
message(NOTICE ">> [INFO] 正在全自动递归扫描 User_Code/module下所有源文件路径...")
message(NOTICE ">> [INFO] 正在全自动递归扫描 User_Code/application下所有通用APP模块的源文件路径...")
# 1. 添加通用代码 (BSP & Module & Application 通用框架)
# 包含 bsp, module 以及 application 下的通用组件
file(GLOB_RECURSE COMMON_SOURCES
"${PROJECT_SOURCE_DIR}/User_Code/bsp/*.c"
"${PROJECT_SOURCE_DIR}/User_Code/bsp/*.cpp"
"${PROJECT_SOURCE_DIR}/User_Code/module/*.c"
"${PROJECT_SOURCE_DIR}/User_Code/module/*.cpp"
# 包含 application 根目录下的 robot.c 等文件 (不递归)
"${PROJECT_SOURCE_DIR}/User_Code/application/*.c"
"${PROJECT_SOURCE_DIR}/User_Code/application/*.cpp"
# 包含 application 下的通用模块 (根据目录结构递归)
"${PROJECT_SOURCE_DIR}/User_Code/application/chassis_app/*.c" "${PROJECT_SOURCE_DIR}/User_Code/application/chassis_app/*.cpp"
"${PROJECT_SOURCE_DIR}/User_Code/application/gimbal_app/*.c" "${PROJECT_SOURCE_DIR}/User_Code/application/gimbal_app/*.cpp"
"${PROJECT_SOURCE_DIR}/User_Code/application/shoot_app/*.c" "${PROJECT_SOURCE_DIR}/User_Code/application/shoot_app/*.cpp"
"${PROJECT_SOURCE_DIR}/User_Code/application/indicator_app/*.c" "${PROJECT_SOURCE_DIR}/User_Code/application/indicator_app/*.cpp"
"${PROJECT_SOURCE_DIR}/User_Code/application/vision_app/*.c" "${PROJECT_SOURCE_DIR}/User_Code/application/vision_app/*.cpp"
)
target_sources(${CMAKE_PROJECT_NAME} PRIVATE ${COMMON_SOURCES})
list(LENGTH COMMON_SOURCES COMMON_SOURCES_COUNT)
# 输出统计结果
message(NOTICE ">> [INFO] 通用库源文件扫描结束,在通用库中共扫描到 ${COMMON_SOURCES_COUNT} 个源文件")
# 2. 根据开关添加特定兵种代码 (Specific Code)
# 定义一个变量来存储当前激活的 App 路径
set(ACTIVE_APP_DIR "")
# 1. 麦轮步兵
if(INFANTRY_MEC)
message(WARNING ">> 当前构建兵种: 麦轮步兵 (INFANTRY_MEC)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/infantry_mec")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE INFANTRY_MEC)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 麦轮步兵 (INFANTRY_MEC)")
# 2. 半舵步兵
elseif(INFANTRY_HALF_STEER)
message(NOTICE ">> 当前构建兵种: 半舵步兵 (INFANTRY_HALF_STEER)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/infantry_half_steer")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE INFANTRY_HALF_STEER)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 半舵步兵 (INFANTRY_HALF_STEER)")
# 3. 麦轮英雄
elseif(HERO_MEC)
message(NOTICE ">> 当前构建兵种: 麦轮英雄 (HERO_MEC)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/hero_mec")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE HERO_MEC)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 麦轮英雄 (HERO_MEC)")
# 4. 舵轮哨兵
elseif(SENTRY_STEER)
message(NOTICE ">> 当前构建兵种: 舵轮哨兵 (SENTRY_STEER)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/sentry_steer")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE SENTRY_STEER SENTRY)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 舵轮哨兵 (SENTRY_STEER)")
# 5. 变形步兵
elseif(INFANTRY_TRANSFORM)
message(NOTICE ">> 当前构建兵种: 变形步兵 (INFANTRY_TRANSFORM)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/infantry_transform")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE INFANTRY_TRANSFORM)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 变形步兵 (INFANTRY_TRANSFORM)")
# 6. 串联腿平衡步兵
elseif(BALANCE_SERIAL)
message(NOTICE ">> 当前构建兵种: 串联腿平衡步兵 (BALANCE_SERIAL)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/balance_serial")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE BALANCE_SERIAL BALANCE)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 串联腿平衡步兵 (BALANCE_SERIAL)")
# 7. 并联腿平衡步兵
elseif(BALANCE_PARALLEL)
message(NOTICE ">> 当前构建兵种: 并联腿平衡步兵 (BALANCE_PARALLEL)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/balance_parallel")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE BALANCE_PARALLEL BALANCE)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 并联腿平衡步兵 (BALANCE_PARALLEL)")
# 8. 飞镖架
elseif(DART)
message(NOTICE ">> 当前构建兵种: 飞镖架 (DART)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/dart")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE DART)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 飞镖架 (DART)")
# 9. 调试模式
elseif(DEV_DEBUG)
message(NOTICE ">> 当前构建兵种: 调试模式 (DEV_DEBUG)")
set(ACTIVE_APP_DIR "${PROJECT_SOURCE_DIR}/User_Code/user_task/dev_tasks")
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE DEV_DEBUG)
message(NOTICE ">> [Specific Source] 开始扫描各兵种对应代码,当前选中的兵种为: 调试模式 (DEV_DEBUG)")
endif()
# 执行特定代码的添加
if(ACTIVE_APP_DIR)
if(EXISTS "${ACTIVE_APP_DIR}")
# 添加该兵种目录下的所有源码
file(GLOB_RECURSE APP_SOURCES "${ACTIVE_APP_DIR}/*.c" "${ACTIVE_APP_DIR}/*.cpp")
# --- 新增:统计文件数量 ---
list(LENGTH APP_SOURCES APP_SOURCES_COUNT)
message(NOTICE ">> [INFO] 兵种对应的源文件目录: ${ACTIVE_APP_DIR}")
message(NOTICE ">> [INFO] 已添加源文件数量: ${APP_SOURCES_COUNT}")
target_sources(${CMAKE_PROJECT_NAME} PRIVATE ${APP_SOURCES})
else()
message(FATAL_ERROR ">> [ERROR] 选中的兵种目录不存在: ${ACTIVE_APP_DIR}")
endif()
endif()
# ------------------------------------------------------------------------------
# 6. 其他设置
# ------------------------------------------------------------------------------
# 其他自定义头文件路径(如果还有不在 User_Code 里的)
target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE
# 可以在此处添加其他包含目录
)
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE
# RM_REFEREE
) )

View File

@@ -1,38 +0,0 @@
{
"version": 3,
"configurePresets": [
{
"name": "default",
"hidden": true,
"generator": "Ninja",
"binaryDir": "${sourceDir}/build/${presetName}",
"toolchainFile": "${sourceDir}/cmake/starm-clang.cmake",
"cacheVariables": {
}
},
{
"name": "Debug",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug"
}
},
{
"name": "Release",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Release"
}
}
],
"buildPresets": [
{
"name": "Debug",
"configurePreset": "Debug"
},
{
"name": "Release",
"configurePreset": "Release"
}
]
}

View File

@@ -67,8 +67,8 @@
#define configCPU_CLOCK_HZ ( SystemCoreClock ) #define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)1000) #define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 56 ) #define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128) #define configMINIMAL_STACK_SIZE ((uint16_t)256)
#define configTOTAL_HEAP_SIZE ((size_t)15360) #define configTOTAL_HEAP_SIZE ((size_t)30720)
#define configMAX_TASK_NAME_LEN ( 16 ) #define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1 #define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0 #define configUSE_16_BIT_TICKS 0
@@ -93,7 +93,7 @@
#define configUSE_TIMERS 1 #define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( 2 ) #define configTIMER_TASK_PRIORITY ( 2 )
#define configTIMER_QUEUE_LENGTH 10 #define configTIMER_QUEUE_LENGTH 10
#define configTIMER_TASK_STACK_DEPTH 256 #define configTIMER_TASK_STACK_DEPTH 512
/* CMSIS-RTOS V2 flags */ /* CMSIS-RTOS V2 flags */
#define configUSE_OS2_THREAD_SUSPEND_RESUME 1 #define configUSE_OS2_THREAD_SUSPEND_RESUME 1

View File

@@ -32,12 +32,15 @@ extern "C" {
/* USER CODE END Includes */ /* USER CODE END Includes */
extern ADC_HandleTypeDef hadc1;
extern ADC_HandleTypeDef hadc3; extern ADC_HandleTypeDef hadc3;
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */ /* USER CODE END Private defines */
void MX_ADC1_Init(void);
void MX_ADC3_Init(void); void MX_ADC3_Init(void);
/* USER CODE BEGIN Prototypes */ /* USER CODE BEGIN Prototypes */

View File

@@ -1,52 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file iwdg.h
* @brief This file contains all the function prototypes for
* the iwdg.c file
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __IWDG_H__
#define __IWDG_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern IWDG_HandleTypeDef hiwdg1;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_IWDG1_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __IWDG_H__ */

View File

@@ -61,10 +61,10 @@ void Error_Handler(void);
#define ACC_CS_GPIO_Port GPIOC #define ACC_CS_GPIO_Port GPIOC
#define GYRO_CS_Pin GPIO_PIN_3 #define GYRO_CS_Pin GPIO_PIN_3
#define GYRO_CS_GPIO_Port GPIOC #define GYRO_CS_GPIO_Port GPIOC
#define pump1_Pin GPIO_PIN_0 #define power2_Pin GPIO_PIN_0
#define pump1_GPIO_Port GPIOA #define power2_GPIO_Port GPIOA
#define pump2_Pin GPIO_PIN_2 #define power1_Pin GPIO_PIN_2
#define pump2_GPIO_Port GPIOA #define power1_GPIO_Port GPIOA
#define pump3_Pin GPIO_PIN_9 #define pump3_Pin GPIO_PIN_9
#define pump3_GPIO_Port GPIOE #define pump3_GPIO_Port GPIOE
#define ACC_INT_Pin GPIO_PIN_10 #define ACC_INT_Pin GPIO_PIN_10

View File

@@ -36,12 +36,15 @@ extern SPI_HandleTypeDef hspi1;
extern SPI_HandleTypeDef hspi2; extern SPI_HandleTypeDef hspi2;
extern SPI_HandleTypeDef hspi6;
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */ /* USER CODE END Private defines */
void MX_SPI1_Init(void); void MX_SPI1_Init(void);
void MX_SPI2_Init(void); void MX_SPI2_Init(void);
void MX_SPI6_Init(void);
/* USER CODE BEGIN Prototypes */ /* USER CODE BEGIN Prototypes */

View File

@@ -61,7 +61,7 @@
/* #define HAL_OSPI_MODULE_ENABLED */ /* #define HAL_OSPI_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED /* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */ /* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */ /* #define HAL_QSPI_MODULE_ENABLED */

View File

@@ -52,12 +52,14 @@ void MemManage_Handler(void);
void BusFault_Handler(void); void BusFault_Handler(void);
void UsageFault_Handler(void); void UsageFault_Handler(void);
void DebugMon_Handler(void); void DebugMon_Handler(void);
void DMA1_Stream0_IRQHandler(void);
void DMA1_Stream1_IRQHandler(void); void DMA1_Stream1_IRQHandler(void);
void DMA1_Stream2_IRQHandler(void); void DMA1_Stream2_IRQHandler(void);
void DMA1_Stream3_IRQHandler(void); void DMA1_Stream3_IRQHandler(void);
void DMA1_Stream4_IRQHandler(void); void DMA1_Stream4_IRQHandler(void);
void DMA1_Stream5_IRQHandler(void); void DMA1_Stream5_IRQHandler(void);
void DMA1_Stream6_IRQHandler(void); void DMA1_Stream6_IRQHandler(void);
void ADC_IRQHandler(void);
void FDCAN1_IT0_IRQHandler(void); void FDCAN1_IT0_IRQHandler(void);
void FDCAN2_IT0_IRQHandler(void); void FDCAN2_IT0_IRQHandler(void);
void SPI1_IRQHandler(void); void SPI1_IRQHandler(void);

View File

@@ -24,8 +24,82 @@
/* USER CODE END 0 */ /* USER CODE END 0 */
ADC_HandleTypeDef hadc1;
ADC_HandleTypeDef hadc3; ADC_HandleTypeDef hadc3;
DMA_HandleTypeDef hdma_adc1;
/* ADC1 init function */
void MX_ADC1_Init(void)
{
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_MultiModeTypeDef multimode = {0};
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV64;
hadc1.Init.Resolution = ADC_RESOLUTION_16B;
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc1.Init.LowPowerAutoWait = DISABLE;
hadc1.Init.ContinuousConvMode = ENABLE;
hadc1.Init.NbrOfConversion = 2;
hadc1.Init.DiscontinuousConvMode = DISABLE;
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR;
hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
hadc1.Init.OversamplingMode = DISABLE;
hadc1.Init.Oversampling.Ratio = 1;
if (HAL_ADC_Init(&hadc1) != HAL_OK)
{
Error_Handler();
}
/** Configure the ADC multi-mode
*/
multimode.Mode = ADC_MODE_INDEPENDENT;
if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
sConfig.Offset = 0;
sConfig.OffsetSignedSaturation = DISABLE;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Rank = ADC_REGULAR_RANK_2;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
/* ADC3 init function */ /* ADC3 init function */
void MX_ADC3_Init(void) void MX_ADC3_Init(void)
{ {
@@ -88,30 +162,55 @@ void MX_ADC3_Init(void)
void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
{ {
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(adcHandle->Instance==ADC3) if(adcHandle->Instance==ADC1)
{ {
/* USER CODE BEGIN ADC3_MspInit 0 */ /* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC3_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */
/* ADC1 clock enable */
__HAL_RCC_ADC12_CLK_ENABLE();
/** Initializes the peripherals clock __HAL_RCC_GPIOC_CLK_ENABLE();
*/ /**ADC1 GPIO Configuration
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC; PC4 ------> ADC1_INP4
PeriphClkInitStruct.PLL2.PLL2M = 2; */
PeriphClkInitStruct.PLL2.PLL2N = 16; GPIO_InitStruct.Pin = GPIO_PIN_4;
PeriphClkInitStruct.PLL2.PLL2P = 2; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
PeriphClkInitStruct.PLL2.PLL2Q = 2; GPIO_InitStruct.Pull = GPIO_NOPULL;
PeriphClkInitStruct.PLL2.PLL2R = 2; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE; /* ADC1 DMA Init */
PeriphClkInitStruct.PLL2.PLL2FRACN = 0; /* ADC1 Init */
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2; hdma_adc1.Instance = DMA1_Stream2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc1.Init.Mode = DMA_CIRCULAR;
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
/* ADC1 interrupt Init */
HAL_NVIC_SetPriority(ADC_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ADC_IRQn);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
else if(adcHandle->Instance==ADC3)
{
/* USER CODE BEGIN ADC3_MspInit 0 */
/* USER CODE END ADC3_MspInit 0 */
/* ADC3 clock enable */ /* ADC3 clock enable */
__HAL_RCC_ADC3_CLK_ENABLE(); __HAL_RCC_ADC3_CLK_ENABLE();
/* USER CODE BEGIN ADC3_MspInit 1 */ /* USER CODE BEGIN ADC3_MspInit 1 */
@@ -123,7 +222,29 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle) void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
{ {
if(adcHandle->Instance==ADC3) if(adcHandle->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC12_CLK_DISABLE();
/**ADC1 GPIO Configuration
PC4 ------> ADC1_INP4
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4);
/* ADC1 DMA DeInit */
HAL_DMA_DeInit(adcHandle->DMA_Handle);
/* ADC1 interrupt Deinit */
HAL_NVIC_DisableIRQ(ADC_IRQn);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
else if(adcHandle->Instance==ADC3)
{ {
/* USER CODE BEGIN ADC3_MspDeInit 0 */ /* USER CODE BEGIN ADC3_MspDeInit 0 */

View File

@@ -44,6 +44,9 @@ void MX_DMA_Init(void)
__HAL_RCC_DMA1_CLK_ENABLE(); __HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */ /* DMA interrupt init */
/* DMA1_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
/* DMA1_Stream1_IRQn interrupt configuration */ /* DMA1_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0); HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);

View File

@@ -25,6 +25,14 @@
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
#include "ws2812status.h"
#include "ins_task.h"
#include "buzzer.h"
// #include "remoteTask.h"
//
// #include "bsp_dwt.h"
// // #include "ins_task.h"
// #include "bsp_log.h"
/* USER CODE END Includes */ /* USER CODE END Includes */
@@ -103,51 +111,82 @@ const osThreadAttr_t reference_attributes = {
.stack_size = 512 * 4, .stack_size = 512 * 4,
.priority = (osPriority_t) osPriorityNormal, .priority = (osPriority_t) osPriorityNormal,
}; };
/* Definitions for WS2812Task */
osThreadId_t WS2812TaskHandle;
const osThreadAttr_t WS2812Task_attributes = {
.name = "WS2812Task",
.stack_size = 256 * 4,
.priority = (osPriority_t) osPriorityBelowNormal,
};
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN FunctionPrototypes */ /* USER CODE BEGIN FunctionPrototypes */
//@Todo:测试instask
const osThreadAttr_t instask_attributes = {
.name = "instask",
.priority = osPriorityAboveNormal, // 较高优先级
.stack_size = 1024 * 4 // 栈大小单位是字节通常是字数的4倍
};
//@Todo:测试使用
osThreadId insTaskHandle;
void StartINSTASK(void const *argument);
/* USER CODE END FunctionPrototypes */ /* USER CODE END FunctionPrototypes */
void StartDefaultTask(void *argument); void StartDefaultTask(void *argument);
void ShootTask(void *argument); void ShootTask(void *argument);
void GimbalTask(void *argument); void GimbalTask(void *argument);
void ChassisTask(void *argument); void ChassisTask(void *argument);
void StartInitTask(void *argument); void StartInitTask(void *argument);
void VisionTask(void *argument); void VisionTask(void *argument);
void CmdTask(void *argument); void CmdTask(void *argument);
void RefereeTask(void *argument); void RefereeTask(void *argument);
extern void ws2812Task(void *argument);
extern void MX_USB_DEVICE_Init(void); extern void MX_USB_DEVICE_Init(void);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* Hook prototypes */ /* Hook prototypes */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName); void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);
void vApplicationMallocFailedHook(void); void vApplicationMallocFailedHook(void);
/* USER CODE BEGIN 4 */ /* USER CODE BEGIN 4 */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName) void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
{ {
/* Run time stack overflow checking is performed if /* Run time stack overflow checking is performed if
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
called if a stack overflow is detected. */ called if a stack overflow is detected. */
} }
/* USER CODE END 4 */ /* USER CODE END 4 */
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
void vApplicationMallocFailedHook(void) void vApplicationMallocFailedHook(void)
{ {
/* vApplicationMallocFailedHook() will only be called if /* vApplicationMallocFailedHook() will only be called if
configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
function that will get called if a call to pvPortMalloc() fails. function that will get called if a call to pvPortMalloc() fails.
pvPortMalloc() is called internally by the kernel whenever a task, queue, pvPortMalloc() is called internally by the kernel whenever a task, queue,
timer or semaphore is created. It is also called by various parts of the timer or semaphore is created. It is also called by various parts of the
demo application. If heap_1.c or heap_2.c are used, then the size of the demo application. If heap_1.c or heap_2.c are used, then the size of the
heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in
FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used
to query the size of free heap space that remains (although it does not to query the size of free heap space that remains (although it does not
provide information on how the remaining heap might be fragmented). */ provide information on how the remaining heap might be fragmented). */
} }
/* USER CODE END 5 */ /* USER CODE END 5 */
/** /**
@@ -155,7 +194,8 @@ void vApplicationMallocFailedHook(void)
* @param None * @param None
* @retval None * @retval None
*/ */
void MX_FREERTOS_Init(void) { void MX_FREERTOS_Init(void)
{
/* USER CODE BEGIN Init */ /* USER CODE BEGIN Init */
/* USER CODE END Init */ /* USER CODE END Init */
@@ -201,14 +241,19 @@ void MX_FREERTOS_Init(void) {
/* creation of reference */ /* creation of reference */
referenceHandle = osThreadNew(RefereeTask, NULL, &reference_attributes); referenceHandle = osThreadNew(RefereeTask, NULL, &reference_attributes);
/* creation of WS2812Task */
WS2812TaskHandle = osThreadNew(ws2812Task, NULL, &WS2812Task_attributes);
/* USER CODE BEGIN RTOS_THREADS */ /* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */ /* add threads, ... */
//@Todo:INS_Task是测试版本
// 创建线程
insTaskHandle = osThreadNew(StartINSTASK, NULL, &instask_attributes);
/* USER CODE END RTOS_THREADS */ /* USER CODE END RTOS_THREADS */
/* USER CODE BEGIN RTOS_EVENTS */ /* USER CODE BEGIN RTOS_EVENTS */
/* add events, ... */ /* add events, ... */
/* USER CODE END RTOS_EVENTS */ /* USER CODE END RTOS_EVENTS */
} }
/* USER CODE BEGIN Header_StartDefaultTask */ /* USER CODE BEGIN Header_StartDefaultTask */
@@ -224,7 +269,7 @@ __weak void StartDefaultTask(void *argument)
MX_USB_DEVICE_Init(); MX_USB_DEVICE_Init();
/* USER CODE BEGIN StartDefaultTask */ /* USER CODE BEGIN StartDefaultTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -242,7 +287,7 @@ __weak void ShootTask(void *argument)
{ {
/* USER CODE BEGIN ShootTask */ /* USER CODE BEGIN ShootTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -260,7 +305,7 @@ __weak void GimbalTask(void *argument)
{ {
/* USER CODE BEGIN GimbalTask */ /* USER CODE BEGIN GimbalTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -278,7 +323,7 @@ __weak void ChassisTask(void *argument)
{ {
/* USER CODE BEGIN ChassisTask */ /* USER CODE BEGIN ChassisTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -296,7 +341,7 @@ __weak void StartInitTask(void *argument)
{ {
/* USER CODE BEGIN StartInitTask */ /* USER CODE BEGIN StartInitTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -314,7 +359,7 @@ __weak void VisionTask(void *argument)
{ {
/* USER CODE BEGIN VisionTask */ /* USER CODE BEGIN VisionTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -332,7 +377,7 @@ __weak void CmdTask(void *argument)
{ {
/* USER CODE BEGIN CmdTask */ /* USER CODE BEGIN CmdTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -350,7 +395,7 @@ __weak void RefereeTask(void *argument)
{ {
/* USER CODE BEGIN RefereeTask */ /* USER CODE BEGIN RefereeTask */
/* Infinite loop */ /* Infinite loop */
for(;;) for (;;)
{ {
osDelay(1); osDelay(1);
} }
@@ -360,5 +405,27 @@ __weak void RefereeTask(void *argument)
/* Private application code --------------------------------------------------*/ /* Private application code --------------------------------------------------*/
/* USER CODE BEGIN Application */ /* USER CODE BEGIN Application */
//@Todo:INS_Task是测试阶段使用。
__attribute__((noreturn)) void StartINSTASK(void const *argument)
{
static float ins_start;
static float ins_dt;
INS_Init(); // 确保BMI088被正确初始化.
// LOGINFO("[freeRTOS] INS Task Start");
for (;;)
{
// 1kHz
// ins_start = DWT_GetTimeline_ms();
INS_Task();
// ins_dt = DWT_GetTimeline_ms() - ins_start;
// if (ins_dt > 1)
// @Todo: LOGERROR("[freeRTOS] INS Task is being DELAY! dt = [%f]", &ins_dt);
// // VisionSend(); // 解算完成后发送视觉数据,但是当前的实现不太优雅,后续若添加硬件触发需要重新考虑结构的组织
osDelay(1); // 1ms, 1kHz
}
}
/* USER CODE END Application */ /* USER CODE END Application */

View File

@@ -38,8 +38,6 @@
* Output * Output
* EVENT_OUT * EVENT_OUT
* EXTI * EXTI
PA6 ------> SPI6_MISO
PA7 ------> SPI6_MOSI
PA8 ------> RCC_MCO_1 PA8 ------> RCC_MCO_1
PC10 ------> SPI3_SCK PC10 ------> SPI3_SCK
PC11 ------> SPI3_MISO PC11 ------> SPI3_MISO
@@ -64,7 +62,7 @@ void MX_GPIO_Init(void)
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15|GYRO_CS_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15|GYRO_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, pump1_Pin|pump2_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOA, power2_Pin|power1_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, pump3_Pin|pump4_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOE, pump3_Pin|pump4_Pin, GPIO_PIN_RESET);
@@ -92,21 +90,13 @@ void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pins : pump1_Pin pump2_Pin */ /*Configure GPIO pins : power2_Pin power1_Pin */
GPIO_InitStruct.Pin = pump1_Pin|pump2_Pin; GPIO_InitStruct.Pin = power2_Pin|power1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLDOWN; GPIO_InitStruct.Pull = GPIO_PULLDOWN;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : PA6 PA7 */
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF8_SPI6;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : pump3_Pin pump4_Pin */ /*Configure GPIO pins : pump3_Pin pump4_Pin */
GPIO_InitStruct.Pin = pump3_Pin|pump4_Pin; GPIO_InitStruct.Pin = pump3_Pin|pump4_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;

View File

@@ -1,56 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file iwdg.c
* @brief This file provides code for the configuration
* of the IWDG instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "iwdg.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
IWDG_HandleTypeDef hiwdg1;
/* IWDG1 init function */
void MX_IWDG1_Init(void)
{
/* USER CODE BEGIN IWDG1_Init 0 */
/* USER CODE END IWDG1_Init 0 */
/* USER CODE BEGIN IWDG1_Init 1 */
/* USER CODE END IWDG1_Init 1 */
hiwdg1.Instance = IWDG1;
hiwdg1.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg1.Init.Window = 4095;
hiwdg1.Init.Reload = 4095;
if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG1_Init 2 */
/* USER CODE END IWDG1_Init 2 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

View File

@@ -23,7 +23,6 @@
#include "crc.h" #include "crc.h"
#include "dma.h" #include "dma.h"
#include "fdcan.h" #include "fdcan.h"
#include "iwdg.h"
#include "spi.h" #include "spi.h"
#include "tim.h" #include "tim.h"
#include "usart.h" #include "usart.h"
@@ -33,6 +32,10 @@
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
#include "buzzer.h"
#include "ws2812status.h"
#include "robot.h"
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/ /* Private typedef -----------------------------------------------------------*/
@@ -58,6 +61,7 @@
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void); void SystemClock_Config(void);
void PeriphCommonClock_Config(void);
static void MPU_Config(void); static void MPU_Config(void);
void MX_FREERTOS_Init(void); void MX_FREERTOS_Init(void);
/* USER CODE BEGIN PFP */ /* USER CODE BEGIN PFP */
@@ -103,6 +107,9 @@ int main(void)
/* Configure the system clock */ /* Configure the system clock */
SystemClock_Config(); SystemClock_Config();
/* Configure the peripherals common clocks */
PeriphCommonClock_Config();
/* USER CODE BEGIN SysInit */ /* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */ /* USER CODE END SysInit */
@@ -126,9 +133,15 @@ int main(void)
MX_SPI1_Init(); MX_SPI1_Init();
MX_UART5_Init(); MX_UART5_Init();
MX_TIM3_Init(); MX_TIM3_Init();
MX_IWDG1_Init(); MX_SPI6_Init();
MX_ADC1_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
robotSelfCheck(); //自检LED
RobotInit();
systemstart_song(); //开机音乐
/*还没有启动调度器!不允许任何涉及到 Freertos ticks的内容在这里运行*/
/* USER CODE END 2 */ /* USER CODE END 2 */
/* Init scheduler */ /* Init scheduler */
@@ -142,12 +155,12 @@ int main(void)
/* Infinite loop */ /* Infinite loop */
/* USER CODE BEGIN WHILE */ /* USER CODE BEGIN WHILE */
while (1) while (1)
{ {
/* USER CODE END WHILE */ /* USER CODE END WHILE */
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
} }
/* USER CODE END 3 */ /* USER CODE END 3 */
} }
@@ -174,11 +187,10 @@ void SystemClock_Config(void)
* in the RCC_OscInitTypeDef structure. * in the RCC_OscInitTypeDef structure.
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI
|RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; |RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1; RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = 64; RCC_OscInitStruct.HSICalibrationValue = 64;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
@@ -215,6 +227,32 @@ void SystemClock_Config(void)
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1);
} }
/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
PeriphClkInitStruct.PLL2.PLL2M = 2;
PeriphClkInitStruct.PLL2.PLL2N = 16;
PeriphClkInitStruct.PLL2.PLL2P = 2;
PeriphClkInitStruct.PLL2.PLL2Q = 2;
PeriphClkInitStruct.PLL2.PLL2R = 2;
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */ /* USER CODE BEGIN 4 */
/* USER CODE END 4 */ /* USER CODE END 4 */
@@ -277,11 +315,11 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
void Error_Handler(void) void Error_Handler(void)
{ {
/* USER CODE BEGIN Error_Handler_Debug */ /* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */ /* User can add his own implementation to report the HAL error return state */
__disable_irq(); __disable_irq();
while (1) while (1)
{ {
} }
/* USER CODE END Error_Handler_Debug */ /* USER CODE END Error_Handler_Debug */
} }
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
@@ -295,8 +333,8 @@ void Error_Handler(void)
void assert_failed(uint8_t *file, uint32_t line) void assert_failed(uint8_t *file, uint32_t line)
{ {
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number, /* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */ /* USER CODE END 6 */
} }
#endif /* USE_FULL_ASSERT */ #endif /* USE_FULL_ASSERT */

View File

@@ -26,6 +26,7 @@
SPI_HandleTypeDef hspi1; SPI_HandleTypeDef hspi1;
SPI_HandleTypeDef hspi2; SPI_HandleTypeDef hspi2;
SPI_HandleTypeDef hspi6;
DMA_HandleTypeDef hdma_spi1_rx; DMA_HandleTypeDef hdma_spi1_rx;
DMA_HandleTypeDef hdma_spi1_tx; DMA_HandleTypeDef hdma_spi1_tx;
DMA_HandleTypeDef hdma_spi2_rx; DMA_HandleTypeDef hdma_spi2_rx;
@@ -114,6 +115,48 @@ void MX_SPI2_Init(void)
/* USER CODE END SPI2_Init 2 */ /* USER CODE END SPI2_Init 2 */
}
/* SPI6 init function */
void MX_SPI6_Init(void)
{
/* USER CODE BEGIN SPI6_Init 0 */
/* USER CODE END SPI6_Init 0 */
/* USER CODE BEGIN SPI6_Init 1 */
/* USER CODE END SPI6_Init 1 */
hspi6.Instance = SPI6;
hspi6.Init.Mode = SPI_MODE_MASTER;
hspi6.Init.Direction = SPI_DIRECTION_2LINES_TXONLY;
hspi6.Init.DataSize = SPI_DATASIZE_8BIT;
hspi6.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi6.Init.CLKPhase = SPI_PHASE_2EDGE;
hspi6.Init.NSS = SPI_NSS_SOFT;
hspi6.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
hspi6.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi6.Init.TIMode = SPI_TIMODE_DISABLE;
hspi6.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi6.Init.CRCPolynomial = 0x0;
hspi6.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
hspi6.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
hspi6.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
hspi6.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
hspi6.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
hspi6.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
hspi6.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
hspi6.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
hspi6.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
hspi6.Init.IOSwap = SPI_IO_SWAP_DISABLE;
if (HAL_SPI_Init(&hspi6) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI6_Init 2 */
/* USER CODE END SPI6_Init 2 */
} }
void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
@@ -180,7 +223,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
__HAL_LINKDMA(spiHandle,hdmarx,hdma_spi1_rx); __HAL_LINKDMA(spiHandle,hdmarx,hdma_spi1_rx);
/* SPI1_TX Init */ /* SPI1_TX Init */
hdma_spi1_tx.Instance = DMA1_Stream2; hdma_spi1_tx.Instance = DMA1_Stream3;
hdma_spi1_tx.Init.Request = DMA_REQUEST_SPI1_TX; hdma_spi1_tx.Init.Request = DMA_REQUEST_SPI1_TX;
hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
@@ -245,7 +288,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
/* SPI2 DMA Init */ /* SPI2 DMA Init */
/* SPI2_RX Init */ /* SPI2_RX Init */
hdma_spi2_rx.Instance = DMA1_Stream3; hdma_spi2_rx.Instance = DMA1_Stream0;
hdma_spi2_rx.Init.Request = DMA_REQUEST_SPI2_RX; hdma_spi2_rx.Init.Request = DMA_REQUEST_SPI2_RX;
hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
@@ -287,6 +330,41 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
/* USER CODE END SPI2_MspInit 1 */ /* USER CODE END SPI2_MspInit 1 */
} }
else if(spiHandle->Instance==SPI6)
{
/* USER CODE BEGIN SPI6_MspInit 0 */
/* USER CODE END SPI6_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI6;
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_HSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* SPI6 clock enable */
__HAL_RCC_SPI6_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI6 GPIO Configuration
PA5 ------> SPI6_SCK
PA6 ------> SPI6_MISO
PA7 ------> SPI6_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF8_SPI6;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN SPI6_MspInit 1 */
/* USER CODE END SPI6_MspInit 1 */
}
} }
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle) void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
@@ -346,6 +424,25 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
/* USER CODE END SPI2_MspDeInit 1 */ /* USER CODE END SPI2_MspDeInit 1 */
} }
else if(spiHandle->Instance==SPI6)
{
/* USER CODE BEGIN SPI6_MspDeInit 0 */
/* USER CODE END SPI6_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI6_CLK_DISABLE();
/**SPI6 GPIO Configuration
PA5 ------> SPI6_SCK
PA6 ------> SPI6_MISO
PA7 ------> SPI6_MOSI
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
/* USER CODE BEGIN SPI6_MspDeInit 1 */
/* USER CODE END SPI6_MspDeInit 1 */
}
} }
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */

View File

@@ -56,6 +56,8 @@
/* External variables --------------------------------------------------------*/ /* External variables --------------------------------------------------------*/
extern PCD_HandleTypeDef hpcd_USB_OTG_HS; extern PCD_HandleTypeDef hpcd_USB_OTG_HS;
extern DMA_HandleTypeDef hdma_adc1;
extern ADC_HandleTypeDef hadc1;
extern FDCAN_HandleTypeDef hfdcan1; extern FDCAN_HandleTypeDef hfdcan1;
extern FDCAN_HandleTypeDef hfdcan2; extern FDCAN_HandleTypeDef hfdcan2;
extern FDCAN_HandleTypeDef hfdcan3; extern FDCAN_HandleTypeDef hfdcan3;
@@ -185,6 +187,20 @@ void DebugMon_Handler(void)
/* please refer to the startup file (startup_stm32h7xx.s). */ /* please refer to the startup file (startup_stm32h7xx.s). */
/******************************************************************************/ /******************************************************************************/
/**
* @brief This function handles DMA1 stream0 global interrupt.
*/
void DMA1_Stream0_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
/* USER CODE END DMA1_Stream0_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi2_rx);
/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
/* USER CODE END DMA1_Stream0_IRQn 1 */
}
/** /**
* @brief This function handles DMA1 stream1 global interrupt. * @brief This function handles DMA1 stream1 global interrupt.
*/ */
@@ -207,7 +223,7 @@ void DMA1_Stream2_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
/* USER CODE END DMA1_Stream2_IRQn 0 */ /* USER CODE END DMA1_Stream2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi1_tx); HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
/* USER CODE END DMA1_Stream2_IRQn 1 */ /* USER CODE END DMA1_Stream2_IRQn 1 */
@@ -221,7 +237,7 @@ void DMA1_Stream3_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
/* USER CODE END DMA1_Stream3_IRQn 0 */ /* USER CODE END DMA1_Stream3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi2_rx); HAL_DMA_IRQHandler(&hdma_spi1_tx);
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
/* USER CODE END DMA1_Stream3_IRQn 1 */ /* USER CODE END DMA1_Stream3_IRQn 1 */
@@ -269,6 +285,20 @@ void DMA1_Stream6_IRQHandler(void)
/* USER CODE END DMA1_Stream6_IRQn 1 */ /* USER CODE END DMA1_Stream6_IRQn 1 */
} }
/**
* @brief This function handles ADC1 and ADC2 global interrupts.
*/
void ADC_IRQHandler(void)
{
/* USER CODE BEGIN ADC_IRQn 0 */
/* USER CODE END ADC_IRQn 0 */
HAL_ADC_IRQHandler(&hadc1);
/* USER CODE BEGIN ADC_IRQn 1 */
/* USER CODE END ADC_IRQn 1 */
}
/** /**
* @brief This function handles FDCAN1 interrupt 0. * @brief This function handles FDCAN1 interrupt 0.
*/ */

View File

@@ -57,11 +57,11 @@
#endif /* HSE_VALUE */ #endif /* HSE_VALUE */
#if !defined (CSI_VALUE) #if !defined (CSI_VALUE)
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* CSI_VALUE */ #endif /* CSI_VALUE */
#if !defined (HSI_VALUE) #if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */ #endif /* HSI_VALUE */
@@ -142,17 +142,17 @@
/** @addtogroup STM32H7xx_System_Private_Variables /** @addtogroup STM32H7xx_System_Private_Variables
* @{ * @{
*/ */
/* This variable is updated in three ways: /* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate() 1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq() 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically. variable is updated automatically.
*/ */
uint32_t SystemCoreClock = 64000000; uint32_t SystemCoreClock = 64000000;
uint32_t SystemD2Clock = 64000000; uint32_t SystemD2Clock = 64000000;
const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
/** /**
* @} * @}
@@ -177,140 +177,149 @@
* @param None * @param None
* @retval None * @retval None
*/ */
void SystemInit (void) void SystemInit(void)
{ {
#if defined (DATA_IN_D2_SRAM) #if defined (DATA_IN_D2_SRAM)
__IO uint32_t tmpreg; __IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */ #endif /* DATA_IN_D2_SRAM */
/* FPU settings ------------------------------------------------------------*/ /* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */
#endif #endif
/* Reset the RCC clock configuration to the default reset state ------------*/ /* Reset the RCC clock configuration to the default reset state ------------*/
/* Increasing the CPU frequency */ /* Increasing the CPU frequency */
if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) if (FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
{ {
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
} }
/* Set HSION bit */ /* Set HSION bit */
RCC->CR |= RCC_CR_HSION; RCC->CR |= RCC_CR_HSION;
/* Reset CFGR register */ /* Reset CFGR register */
RCC->CFGR = 0x00000000; RCC->CFGR = 0x00000000;
/* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */ /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
RCC->CR &= 0xEAF6ED7FU; RCC->CR &= 0xEAF6ED7FU;
/* Decreasing the number of wait states because of lower CPU frequency */ /* Decreasing the number of wait states because of lower CPU frequency */
if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) if (FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
{ {
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
} }
#if defined(D3_SRAM_BASE) #if defined(D3_SRAM_BASE)
/* Reset D1CFGR register */ /* Reset D1CFGR register */
RCC->D1CFGR = 0x00000000; RCC->D1CFGR = 0x00000000;
/* Reset D2CFGR register */ /* Reset D2CFGR register */
RCC->D2CFGR = 0x00000000; RCC->D2CFGR = 0x00000000;
/* Reset D3CFGR register */ /* Reset D3CFGR register */
RCC->D3CFGR = 0x00000000; RCC->D3CFGR = 0x00000000;
#else #else
/* Reset CDCFGR1 register */ /* Reset CDCFGR1 register */
RCC->CDCFGR1 = 0x00000000; RCC->CDCFGR1 = 0x00000000;
/* Reset CDCFGR2 register */ /* Reset CDCFGR2 register */
RCC->CDCFGR2 = 0x00000000; RCC->CDCFGR2 = 0x00000000;
/* Reset SRDCFGR register */ /* Reset SRDCFGR register */
RCC->SRDCFGR = 0x00000000; RCC->SRDCFGR = 0x00000000;
#endif #endif
/* Reset PLLCKSELR register */ /* Reset PLLCKSELR register */
RCC->PLLCKSELR = 0x02020200; RCC->PLLCKSELR = 0x02020200;
/* Reset PLLCFGR register */ /* Reset PLLCFGR register */
RCC->PLLCFGR = 0x01FF0000; RCC->PLLCFGR = 0x01FF0000;
/* Reset PLL1DIVR register */ /* Reset PLL1DIVR register */
RCC->PLL1DIVR = 0x01010280; RCC->PLL1DIVR = 0x01010280;
/* Reset PLL1FRACR register */ /* Reset PLL1FRACR register */
RCC->PLL1FRACR = 0x00000000; RCC->PLL1FRACR = 0x00000000;
/* Reset PLL2DIVR register */ /* Reset PLL2DIVR register */
RCC->PLL2DIVR = 0x01010280; RCC->PLL2DIVR = 0x01010280;
/* Reset PLL2FRACR register */ /* Reset PLL2FRACR register */
RCC->PLL2FRACR = 0x00000000; RCC->PLL2FRACR = 0x00000000;
/* Reset PLL3DIVR register */ /* Reset PLL3DIVR register */
RCC->PLL3DIVR = 0x01010280; RCC->PLL3DIVR = 0x01010280;
/* Reset PLL3FRACR register */ /* Reset PLL3FRACR register */
RCC->PLL3FRACR = 0x00000000; RCC->PLL3FRACR = 0x00000000;
/* Reset HSEBYP bit */ /* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU; RCC->CR &= 0xFFFBFFFFU;
/* Disable all interrupts */ /* Disable all interrupts */
RCC->CIER = 0x00000000; RCC->CIER = 0x00000000;
#if (STM32H7_DEV_ID == 0x450UL) #if (STM32H7_DEV_ID == 0x450UL)
/* dual core CM7 or single core line */ /* dual core CM7 or single core line */
if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U) if ((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
{ {
/* if stm32h7 revY*/ /* if stm32h7 revY*/
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */ /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
*((__IO uint32_t*)0x51008108) = 0x000000001U; *((__IO
} uint32_t *
)
0x51008108
)
=
0x000000001U;
}
#endif /* STM32H7_DEV_ID */ #endif /* STM32H7_DEV_ID */
#if defined(DATA_IN_D2_SRAM) #if defined(DATA_IN_D2_SRAM)
/* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */ /* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */
#if defined(RCC_AHB2ENR_D2SRAM3EN) #if defined(RCC_AHB2ENR_D2SRAM3EN)
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN); RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN);
#elif defined(RCC_AHB2ENR_D2SRAM2EN) #elif defined(RCC_AHB2ENR_D2SRAM2EN)
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN); RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN);
#else #else
RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN); RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
#endif /* RCC_AHB2ENR_D2SRAM3EN */ #endif /* RCC_AHB2ENR_D2SRAM3EN */
tmpreg = RCC->AHB2ENR; tmpreg = RCC->AHB2ENR;
(void) tmpreg; (void) tmpreg;
#endif /* DATA_IN_D2_SRAM */ #endif /* DATA_IN_D2_SRAM */
#if defined(DUAL_CORE) && defined(CORE_CM4) #if defined(DUAL_CORE) && defined(CORE_CM4)
/* Configure the Vector Table location add offset address for cortex-M4 ------------------*/ /* Configure the Vector Table location add offset address for cortex-M4 ------------------*/
#if defined(USER_VECT_TAB_ADDRESS) #if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
/* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */ #endif /* USER_VECT_TAB_ADDRESS */
#else #else
if(READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) == 0U) if (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) == 0U)
{ {
/* Enable the FMC interface clock */ /* Enable the FMC interface clock */
SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* /*
* Disable the FMC bank1 (enabled after reset). * Disable the FMC bank1 (enabled after reset).
* This, prevents CPU speculation access on this bank which blocks the use of FMC during * This, prevents CPU speculation access on this bank which blocks the use of FMC during
* 24us. During this time the others FMC master (such as LTDC) cannot use it! * 24us. During this time the others FMC master (such as LTDC) cannot use it!
*/ */
FMC_Bank1_R->BTCR[0] = 0x000030D2; FMC_Bank1_R->BTCR[0] = 0x000030D2;
/* Disable the FMC interface clock */ /* Disable the FMC interface clock */
CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
} }
/* Configure the Vector Table location -------------------------------------*/ /* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS) #if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
/* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */ #endif /* USER_VECT_TAB_ADDRESS */
__HAL_RCC_D2SRAM1_CLK_ENABLE(); //添加如下代码使能D2域的RAM之用的ram_1,顺便把ram_d2也使能了
__HAL_RCC_D2SRAM2_CLK_ENABLE(); //ps.不使能的话会导致变量显式初始化无法赋值
#endif /*DUAL_CORE && CORE_CM4*/ #endif /*DUAL_CORE && CORE_CM4*/
} }
@@ -351,102 +360,112 @@ void SystemInit (void)
* @param None * @param None
* @retval None * @retval None
*/ */
void SystemCoreClockUpdate (void) void SystemCoreClockUpdate(void)
{ {
uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp; uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp;
uint32_t common_system_clock; uint32_t common_system_clock;
float_t fracn1, pllvco; float_t fracn1, pllvco;
/* Get SYSCLK source -------------------------------------------------------*/ /* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS) switch (RCC->CFGR & RCC_CFGR_SWS)
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
break;
case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
common_system_clock = CSI_VALUE;
break;
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
common_system_clock = HSE_VALUE;
break;
case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
SYSCLK = PLL_VCO / PLLR
*/
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ;
pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos);
fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
if (pllm != 0U)
{ {
switch (pllsource) case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
{ common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> 3));
case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */ break;
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ; case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); common_system_clock = CSI_VALUE;
break;
break; case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
common_system_clock = HSE_VALUE;
break;
case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */ case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
break;
case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); SYSCLK = PLL_VCO / PLLR
break; */
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4);
pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
fracn1 = (float_t) (uint32_t) (pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
default: if (pllm != 0U)
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ; {
pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); switch (pllsource)
break; {
} case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ;
common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp); hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> 3));
pllvco = ((float_t) hsivalue / (float_t) pllm) * (
(float_t) (uint32_t) (RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (
fracn1 / (float_t) 0x2000) + (float_t) 1);
break;
case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */
pllvco = ((float_t) CSI_VALUE / (float_t) pllm) * (
(float_t) (uint32_t) (RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (
fracn1 / (float_t) 0x2000) + (float_t) 1);
break;
case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */
pllvco = ((float_t) HSE_VALUE / (float_t) pllm) * (
(float_t) (uint32_t) (RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (
fracn1 / (float_t) 0x2000) + (float_t) 1);
break;
default:
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> 3));
pllvco = ((float_t) hsivalue / (float_t) pllm) * (
(float_t) (uint32_t) (RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (
fracn1 / (float_t) 0x2000) + (float_t) 1);
break;
}
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U);
common_system_clock = (uint32_t) (float_t) (pllvco / (float_t) pllp);
}
else
{
common_system_clock = 0U;
}
break;
default:
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> 3));
break;
} }
else
{
common_system_clock = 0U;
}
break;
default: /* Compute SystemClock frequency --------------------------------------------------*/
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
break;
}
/* Compute SystemClock frequency --------------------------------------------------*/
#if defined (RCC_D1CFGR_D1CPRE) #if defined (RCC_D1CFGR_D1CPRE)
tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]; tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos];
/* common_system_clock frequency : CM7 CPU frequency */ /* common_system_clock frequency : CM7 CPU frequency */
common_system_clock >>= tmp; common_system_clock >>= tmp;
/* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */ /* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos])
& 0x1FU));
#else #else
tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]; tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos];
/* common_system_clock frequency : CM7 CPU frequency */ /* common_system_clock frequency : CM7 CPU frequency */
common_system_clock >>= tmp; common_system_clock >>= tmp;
/* SystemD2Clock frequency : AXI and AHBs Clock frequency */ /* SystemD2Clock frequency : AXI and AHBs Clock frequency */
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU)); SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[
(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE) >> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU));
#endif #endif
#if defined(DUAL_CORE) && defined(CORE_CM4) #if defined(DUAL_CORE) && defined(CORE_CM4)
SystemCoreClock = SystemD2Clock; SystemCoreClock = SystemD2Clock;
#else #else
SystemCoreClock = common_system_clock; SystemCoreClock = common_system_clock;
#endif /* DUAL_CORE && CORE_CM4 */ #endif /* DUAL_CORE && CORE_CM4 */
} }
@@ -476,70 +495,81 @@ void SystemCoreClockUpdate (void)
void ExitRun0Mode(void) void ExitRun0Mode(void)
{ {
#if defined(USE_PWR_LDO_SUPPLY) #if defined(USE_PWR_LDO_SUPPLY)
#if defined(SMPS) #if defined(SMPS)
/* Exit Run* mode by disabling SMPS and enabling LDO */ /* Exit Run* mode by disabling SMPS and enabling LDO */
PWR->CR3 = (PWR->CR3 & ~PWR_CR3_SMPSEN) | PWR_CR3_LDOEN; PWR->CR3 = (PWR->CR3 & ~PWR_CR3_SMPSEN) | PWR_CR3_LDOEN;
#else #else
/* Enable LDO mode */ /* Enable LDO mode */
PWR->CR3 |= PWR_CR3_LDOEN; PWR->CR3 |= PWR_CR3_LDOEN;
#endif /* SMPS */ #endif /* SMPS */
/* Wait till voltage level flag is set */ /* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U) while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{} {
}
#elif defined(USE_PWR_EXTERNAL_SOURCE_SUPPLY) #elif defined(USE_PWR_EXTERNAL_SOURCE_SUPPLY)
#if defined(SMPS) #if defined(SMPS)
/* Exit Run* mode */ /* Exit Run* mode */
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_SMPSEN | PWR_CR3_LDOEN)) | PWR_CR3_BYPASS; PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_SMPSEN | PWR_CR3_LDOEN)) | PWR_CR3_BYPASS;
#else
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_BYPASS;
#endif /* SMPS */
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#elif defined(USE_PWR_DIRECT_SMPS_SUPPLY) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 &= ~(PWR_CR3_LDOEN);
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_EXT) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_EXT) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{}
#else #else
/* No system power supply configuration is selected at exit Run* mode */ PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_BYPASS;
#endif /* SMPS */
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#elif defined(USE_PWR_DIRECT_SMPS_SUPPLY) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 &= ~(PWR_CR3_LDOEN);
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 |= PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_EXT) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN |
PWR_CR3_BYPASS;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_EXT) && defined(SMPS)
/* Exit Run* mode */
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN |
PWR_CR3_BYPASS;
/* Wait till voltage level flag is set */
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
{
}
#else
/* No system power supply configuration is selected at exit Run* mode */
#endif /* USE_PWR_LDO_SUPPLY */ #endif /* USE_PWR_LDO_SUPPLY */
} }

View File

@@ -241,7 +241,7 @@ void MX_USART3_UART_Init(void)
huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1; huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT; huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT;
huart3.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; huart3.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE;
if (HAL_RS485Ex_Init(&huart3, UART_DE_POLARITY_HIGH, 0, 0) != HAL_OK) if (HAL_UART_Init(&huart3) != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
@@ -601,20 +601,11 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
/* USART3 clock enable */ /* USART3 clock enable */
__HAL_RCC_USART3_CLK_ENABLE(); __HAL_RCC_USART3_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE();
/**USART3 GPIO Configuration /**USART3 GPIO Configuration
PB14 ------> USART3_DE
PD8 ------> USART3_TX PD8 ------> USART3_TX
PD9 ------> USART3_RX PD9 ------> USART3_RX
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
@@ -858,12 +849,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
__HAL_RCC_USART3_CLK_DISABLE(); __HAL_RCC_USART3_CLK_DISABLE();
/**USART3 GPIO Configuration /**USART3 GPIO Configuration
PB14 ------> USART3_DE
PD8 ------> USART3_TX PD8 ------> USART3_TX
PD9 ------> USART3_RX PD9 ------> USART3_RX
*/ */
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9); HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9);
/* USART3 DMA DeInit */ /* USART3 DMA DeInit */

View File

@@ -0,0 +1,378 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_common_tables.h
* Description: Extern declaration for common tables
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _ARM_COMMON_TABLES_H
#define _ARM_COMMON_TABLES_H
#include "arm_math.h"
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
extern const uint16_t armBitRevTable[1024];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
extern const float32_t twiddleCoef_16[32];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
extern const float32_t twiddleCoef_32[64];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
extern const float32_t twiddleCoef_64[128];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
extern const float32_t twiddleCoef_128[256];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
extern const float32_t twiddleCoef_256[512];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
extern const float32_t twiddleCoef_512[1024];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
extern const float32_t twiddleCoef_1024[2048];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
extern const float32_t twiddleCoef_2048[4096];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
extern const float32_t twiddleCoef_4096[8192];
#define twiddleCoef twiddleCoef_4096
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
extern const q31_t twiddleCoef_16_q31[24];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
extern const q31_t twiddleCoef_32_q31[48];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
extern const q31_t twiddleCoef_64_q31[96];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
extern const q31_t twiddleCoef_128_q31[192];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
extern const q31_t twiddleCoef_256_q31[384];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
extern const q31_t twiddleCoef_512_q31[768];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
extern const q31_t twiddleCoef_1024_q31[1536];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
extern const q31_t twiddleCoef_2048_q31[3072];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
extern const q31_t twiddleCoef_4096_q31[6144];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
extern const q15_t twiddleCoef_16_q15[24];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
extern const q15_t twiddleCoef_32_q15[48];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
extern const q15_t twiddleCoef_64_q15[96];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
extern const q15_t twiddleCoef_128_q15[192];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
extern const q15_t twiddleCoef_256_q15[384];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
extern const q15_t twiddleCoef_512_q15[768];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
extern const q15_t twiddleCoef_1024_q15[1536];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
extern const q15_t twiddleCoef_2048_q15[3072];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
extern const q15_t twiddleCoef_4096_q15[6144];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
extern const float32_t twiddleCoef_rfft_32[32];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
extern const float32_t twiddleCoef_rfft_64[64];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
extern const float32_t twiddleCoef_rfft_128[128];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
extern const float32_t twiddleCoef_rfft_256[256];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
extern const float32_t twiddleCoef_rfft_512[512];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
extern const float32_t twiddleCoef_rfft_1024[1024];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
extern const float32_t twiddleCoef_rfft_2048[2048];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
extern const float32_t twiddleCoef_rfft_4096[4096];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
/* floating-point bit reversal tables */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
/* fixed-point bit reversal tables */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
extern const float32_t realCoefA[8192];
extern const float32_t realCoefB[8192];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
extern const q31_t realCoefAQ31[8192];
extern const q31_t realCoefBQ31[8192];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
extern const q15_t realCoefAQ15[8192];
extern const q15_t realCoefBQ15[8192];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
extern const float32_t Weights_128[256];
extern const float32_t cos_factors_128[128];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
extern const float32_t Weights_512[1024];
extern const float32_t cos_factors_512[512];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
extern const float32_t Weights_2048[4096];
extern const float32_t cos_factors_2048[2048];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
extern const float32_t Weights_8192[16384];
extern const float32_t cos_factors_8192[8192];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
extern const q15_t WeightsQ15_128[256];
extern const q15_t cos_factorsQ15_128[128];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
extern const q15_t WeightsQ15_512[1024];
extern const q15_t cos_factorsQ15_512[512];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
extern const q15_t WeightsQ15_2048[4096];
extern const q15_t cos_factorsQ15_2048[2048];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
extern const q15_t WeightsQ15_8192[16384];
extern const q15_t cos_factorsQ15_8192[8192];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
extern const q31_t WeightsQ31_128[256];
extern const q31_t cos_factorsQ31_128[128];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
extern const q31_t WeightsQ31_512[1024];
extern const q31_t cos_factorsQ31_512[512];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
extern const q31_t WeightsQ31_2048[4096];
extern const q31_t cos_factorsQ31_2048[2048];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
extern const q31_t WeightsQ31_8192[16384];
extern const q31_t cos_factorsQ31_8192[8192];
#endif
#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
extern const q15_t armRecipTableQ15[64];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
extern const q31_t armRecipTableQ31[64];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
/* Tables for Fast Math Sine and Cosine */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
#endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
#endif /* ARM_COMMON_TABLES_H */

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/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_const_structs.h
* Description: Constant structs that are initialized for user convenience.
* For example, some can be given as arguments to the arm_cfft_f32() function.
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _ARM_CONST_STRUCTS_H
#define _ARM_CONST_STRUCTS_H
#include "arm_math.h"
#include "arm_common_tables.h"
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
#endif

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/**
******************************************************************************
* @file stm32h7xx_hal_iwdg.h
* @author MCD Application Team
* @brief Header file of IWDG HAL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_HAL_IWDG_H
#define STM32H7xx_HAL_IWDG_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal_def.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
/** @defgroup IWDG IWDG
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup IWDG_Exported_Types IWDG Exported Types
* @{
*/
/**
* @brief IWDG Init structure definition
*/
typedef struct
{
uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
This parameter can be a value of @ref IWDG_Prescaler */
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
} IWDG_InitTypeDef;
/**
* @brief IWDG Handle Structure definition
*/
typedef struct
{
IWDG_TypeDef *Instance; /*!< Register base address */
IWDG_InitTypeDef Init; /*!< IWDG required parameters */
} IWDG_HandleTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
* @{
*/
/** @defgroup IWDG_Prescaler IWDG Prescaler
* @{
*/
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
/**
* @}
*/
/** @defgroup IWDG_Window_option IWDG Window option
* @{
*/
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
/**
* @}
*/
/**
* @}
*/
/* Exported macros -----------------------------------------------------------*/
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
* @{
*/
/**
* @brief Enable the IWDG peripheral.
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
/**
* @brief Reload IWDG counter with value defined in the reload register
* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
* @{
*/
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
* @{
*/
/* Initialization/Start functions ********************************************/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
/**
* @}
*/
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
* @{
*/
/* I/O operation functions ****************************************************/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
/**
* @}
*/
/**
* @}
*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup IWDG_Private_Constants IWDG Private Constants
* @{
*/
/**
* @brief IWDG Key Register BitMask
*/
#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup IWDG_Private_Macros IWDG Private Macros
* @{
*/
/**
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
/**
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
/**
* @brief Check IWDG prescaler value.
* @param __PRESCALER__ IWDG prescaler value
* @retval None
*/
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
((__PRESCALER__) == IWDG_PRESCALER_8) || \
((__PRESCALER__) == IWDG_PRESCALER_16) || \
((__PRESCALER__) == IWDG_PRESCALER_32) || \
((__PRESCALER__) == IWDG_PRESCALER_64) || \
((__PRESCALER__) == IWDG_PRESCALER_128)|| \
((__PRESCALER__) == IWDG_PRESCALER_256))
/**
* @brief Check IWDG reload value.
* @param __RELOAD__ IWDG reload value
* @retval None
*/
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
/**
* @brief Check IWDG window value.
* @param __WINDOW__ IWDG window value
* @retval None
*/
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7xx_HAL_IWDG_H */

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/**
******************************************************************************
* @file stm32h7xx_ll_iwdg.h
* @author MCD Application Team
* @brief Header file of IWDG LL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_LL_IWDG_H
#define STM32H7xx_LL_IWDG_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx.h"
/** @addtogroup STM32H7xx_LL_Driver
* @{
*/
#if defined(IWDG1) || defined(IWDG2)
/** @defgroup IWDG_LL IWDG
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
* @{
*/
#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
* @{
*/
/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
* @brief Flags defines which can be used with LL_IWDG_ReadReg function
* @{
*/
#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
/**
* @}
*/
/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
* @{
*/
#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
* @{
*/
/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
* @{
*/
/**
* @brief Write a value in IWDG register
* @param __INSTANCE__ IWDG Instance
* @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register
* @retval None
*/
#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
/**
* @brief Read a value in IWDG register
* @param __INSTANCE__ IWDG Instance
* @param __REG__ Register to be read
* @retval Register value
*/
#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
* @{
*/
/** @defgroup IWDG_LL_EF_Configuration Configuration
* @{
*/
/**
* @brief Start the Independent Watchdog
* @note Except if the hardware watchdog option is selected
* @rmtoll KR KEY LL_IWDG_Enable
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
}
/**
* @brief Reloads IWDG counter with value defined in the reload register
* @rmtoll KR KEY LL_IWDG_ReloadCounter
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
}
/**
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
* @rmtoll KR KEY LL_IWDG_EnableWriteAccess
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
}
/**
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
* @rmtoll KR KEY LL_IWDG_DisableWriteAccess
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
}
/**
* @brief Select the prescaler of the IWDG
* @rmtoll PR PR LL_IWDG_SetPrescaler
* @param IWDGx IWDG Instance
* @param Prescaler This parameter can be one of the following values:
* @arg @ref LL_IWDG_PRESCALER_4
* @arg @ref LL_IWDG_PRESCALER_8
* @arg @ref LL_IWDG_PRESCALER_16
* @arg @ref LL_IWDG_PRESCALER_32
* @arg @ref LL_IWDG_PRESCALER_64
* @arg @ref LL_IWDG_PRESCALER_128
* @arg @ref LL_IWDG_PRESCALER_256
* @retval None
*/
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
{
WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
}
/**
* @brief Get the selected prescaler of the IWDG
* @rmtoll PR PR LL_IWDG_GetPrescaler
* @param IWDGx IWDG Instance
* @retval Returned value can be one of the following values:
* @arg @ref LL_IWDG_PRESCALER_4
* @arg @ref LL_IWDG_PRESCALER_8
* @arg @ref LL_IWDG_PRESCALER_16
* @arg @ref LL_IWDG_PRESCALER_32
* @arg @ref LL_IWDG_PRESCALER_64
* @arg @ref LL_IWDG_PRESCALER_128
* @arg @ref LL_IWDG_PRESCALER_256
*/
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->PR));
}
/**
* @brief Specify the IWDG down-counter reload value
* @rmtoll RLR RL LL_IWDG_SetReloadCounter
* @param IWDGx IWDG Instance
* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
* @retval None
*/
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
{
WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
}
/**
* @brief Get the specified IWDG down-counter reload value
* @rmtoll RLR RL LL_IWDG_GetReloadCounter
* @param IWDGx IWDG Instance
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
*/
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->RLR));
}
/**
* @brief Specify high limit of the window value to be compared to the down-counter.
* @rmtoll WINR WIN LL_IWDG_SetWindow
* @param IWDGx IWDG Instance
* @param Window Value between Min_Data=0 and Max_Data=0x0FFF
* @retval None
*/
__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
{
WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
}
/**
* @brief Get the high limit of the window value specified.
* @rmtoll WINR WIN LL_IWDG_GetWindow
* @param IWDGx IWDG Instance
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
*/
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->WINR));
}
/**
* @}
*/
/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
* @{
*/
/**
* @brief Check if flag Prescaler Value Update is set or not
* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
}
/**
* @brief Check if flag Reload Value Update is set or not
* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
}
/**
* @brief Check if flag Window Value Update is set or not
* @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
}
/**
* @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
* @rmtoll SR PVU LL_IWDG_IsReady\n
* SR RVU LL_IWDG_IsReady\n
* SR WVU LL_IWDG_IsReady
* @param IWDGx IWDG Instance
* @retval State of bits (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* IWDG1 || IWDG2 */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7xx_LL_IWDG_H */

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@@ -1,284 +0,0 @@
/**
******************************************************************************
* @file stm32h7xx_hal_iwdg.c
* @author MCD Application Team
* @brief IWDG HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Independent Watchdog (IWDG) peripheral:
* + Initialization and Start functions
* + IO operation functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### IWDG Generic features #####
==============================================================================
[..]
(+) The IWDG can be started by either software or hardware (configurable
through option byte).
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
active even if the main clock fails.
(+) Once the IWDG is started, the LSI is forced ON and both cannot be
disabled. The counter starts counting down from the reset value (0xFFF).
When it reaches the end of count value (0x000) a reset signal is
generated (IWDG reset).
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
the IWDG_RLR value is reloaded into the counter and the watchdog reset
is prevented.
(+) The IWDG is implemented in the VDD voltage domain that is still functional
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
reset occurs.
(+) Debug mode: When the microcontroller enters debug mode (core halted),
the IWDG counter either continues to work normally or stops, depending
on DBG_IWDG_STOP configuration bit in DBG module, accessible through
__HAL_DBGMCU_FREEZE_IWDG1() or __HAL_DBGMCU_FREEZE2_IWDG2() and
__HAL_DBGMCU_UnFreeze_IWDG1 or __HAL_DBGMCU_UnFreeze2_IWDG2() macros.
[..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
The IWDG timeout may vary due to LSI clock frequency dispersion.
STM32H7xx devices provide the capability to measure the LSI clock
frequency (LSI clock is internally connected to TIM16 CH1 input capture).
The measured value can be used to have an IWDG timeout with an
acceptable accuracy.
[..] Default timeout value (necessary for IWDG_SR status register update):
Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
This frequency being subject to variations as mentioned above, the
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
below) may become too short or too long.
In such cases, this default timeout value can be tuned by redefining
the constant LSI_VALUE at user-application level (based, for instance,
on the measured LSI clock frequency as explained above).
##### How to use this driver #####
==============================================================================
[..]
(#) Use IWDG using HAL_IWDG_Init() function to :
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
clock is forced ON and IWDG counter starts counting down.
(++) Enable write access to configuration registers:
IWDG_PR, IWDG_RLR and IWDG_WINR.
(++) Configure the IWDG prescaler and counter reload value. This reload
value will be loaded in the IWDG counter each time the watchdog is
reloaded, then the IWDG will start counting down from this value.
(++) Depending on window parameter:
(+++) If Window Init parameter is same as Window register value,
nothing more is done but reload counter value in order to exit
function with exact time base.
(+++) Else modify Window register. This will automatically reload
watchdog counter.
(++) Wait for status flags to be reset.
(#) Then the application program must refresh the IWDG counter at regular
intervals during normal operation to prevent an MCU reset, using
HAL_IWDG_Refresh() function.
*** IWDG HAL driver macros list ***
====================================
[..]
Below the list of most used macros in IWDG HAL driver:
(+) __HAL_IWDG_START: Enable the IWDG peripheral
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
the reload register
@endverbatim
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
#ifdef HAL_IWDG_MODULE_ENABLED
/** @addtogroup IWDG
* @brief IWDG HAL module driver.
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup IWDG_Private_Defines IWDG Private Defines
* @{
*/
/* Status register needs up to 5 LSI clock periods divided by the clock
prescaler to be updated. The number of LSI clock periods is upper-rounded to
6 for the timeout value calculation.
The timeout value is calculated using the highest prescaler (256) and
the LSI_VALUE constant. The value of this constant can be changed by the user
to take into account possible LSI clock period variations.
The timeout value is multiplied by 1000 to be converted in milliseconds.
LSI startup time is also considered here by adding LSI_STARTUP_TIME
converted in milliseconds. */
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
((LSI_STARTUP_TIME / 1000UL) + 1UL))
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup IWDG_Exported_Functions
* @{
*/
/** @addtogroup IWDG_Exported_Functions_Group1
* @brief Initialization and Start functions.
*
@verbatim
===============================================================================
##### Initialization and Start functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initialize the IWDG according to the specified parameters in the
IWDG_InitTypeDef of associated handle.
(+) Manage Window option.
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
is reloaded in order to exit function with correct time base.
@endverbatim
* @{
*/
/**
* @brief Initialize the IWDG according to the specified parameters in the
* IWDG_InitTypeDef and start watchdog. Before exiting function,
* watchdog is refreshed in order to have correct time base.
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
uint32_t tickstart;
/* Check the IWDG handle allocation */
if (hiwdg == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
/* Enable IWDG. LSI is turned on automatically */
__HAL_IWDG_START(hiwdg);
/* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
0x5555 in KR */
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
/* Write to IWDG registers the Prescaler & Reload values to work with */
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
hiwdg->Instance->RLR = hiwdg->Init.Reload;
/* Check pending flag, if previous update not done, return timeout */
tickstart = HAL_GetTick();
/* Wait for register to be updated */
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
{
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
{
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
{
return HAL_TIMEOUT;
}
}
}
/* If window parameter is different than current value, modify window
register */
if (hiwdg->Instance->WINR != hiwdg->Init.Window)
{
/* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
even if window feature is disabled, Watchdog will be reloaded by writing
windows register */
hiwdg->Instance->WINR = hiwdg->Init.Window;
}
else
{
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
}
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/** @addtogroup IWDG_Exported_Functions_Group2
* @brief IO operation functions
*
@verbatim
===============================================================================
##### IO operation functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Refresh the IWDG.
@endverbatim
* @{
*/
/**
* @brief Refresh the IWDG.
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
{
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_IWDG_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/

201
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View File

@@ -0,0 +1,201 @@
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212
MY_FLASH.ld Normal file
View File

@@ -0,0 +1,212 @@
/*
******************************************************************************
**
** File : LinkerScript.ld
**
** Author : STM32CubeMX
**
** Abstract : Linker script for STM32H723VGTx series
** 1024Kbytes FLASH and 368Kbytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed “as is,” without any warranty
** of any kind.
**
*****************************************************************************
** @attention
**
** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
** 1. Redistributions of source code must retain the above copyright notice,
** this list of conditions and the following disclaimer.
** 2. Redistributions in binary form must reproduce the above copyright notice,
** this list of conditions and the following disclaimer in the documentation
** and/or other materials provided with the distribution.
** 3. Neither the name of STMicroelectronics nor the names of its contributors
** may be used to endorse or promote products derived from this software
** without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
*****************************************************************************
*/
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = ORIGIN(DTCMRAM) + LENGTH(DTCMRAM); /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x5000; /* required amount of heap */
_Min_Stack_Size = 0x5000; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
ITCMRAM (xrw) : ORIGIN = 0x00000008, LENGTH = 64K
DTCMRAM (xrw) : ORIGIN = 0x20000400, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 128K
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
.ITCM :
{
. = ALIGN(4);
__itcm_start = .;
*(.ITCM)
. = ALIGN(4);
__itcm_end = .;
} > ITCMRAM AT>FLASH
__itcm_rom_start = LOADADDR(.ITCM);
__itcm_size = SIZEOF(.ITCM);
/* The program code and other data goes into FLASH */
.text :
{
_stext = .; /* create a global symbol at text start */
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
/* Constant data goes into FLASH */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >DTCMRAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >DTCMRAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(8);
_sstack = .;
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
_estack = .;
} >DTCMRAM
/*在RAM_D1中开辟DMA缓存区域*/
._DMA_RAM :
{
. = ALIGN(4);
*(_DMA_RAM)
. = ALIGN(4);
} >RAM
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,201 @@
Apache License
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View File

@@ -1,7 +1,6 @@
/* /*
****************************************************************************** ******************************************************************************
** **
** File : LinkerScript.ld ** File : LinkerScript.ld
** **
** Author : STM32CubeMX ** Author : STM32CubeMX
@@ -16,7 +15,7 @@
** **
** Target : STMicroelectronics STM32 ** Target : STMicroelectronics STM32
** **
** Distribution: The file is distributed as is, without any warranty ** Distribution: The file is distributed "as is," without any warranty
** of any kind. ** of any kind.
** **
***************************************************************************** *****************************************************************************
@@ -24,105 +23,95 @@
** **
** <h2><center>&copy; COPYRIGHT(c) 2025 STMicroelectronics</center></h2> ** <h2><center>&copy; COPYRIGHT(c) 2025 STMicroelectronics</center></h2>
** **
** Redistribution and use in source and binary forms, with or without modification, ** 版权声明和许可条款
** are permitted provided that the following conditions are met:
** 1. Redistributions of source code must retain the above copyright notice,
** this list of conditions and the following disclaimer.
** 2. Redistributions in binary form must reproduce the above copyright notice,
** this list of conditions and the following disclaimer in the documentation
** and/or other materials provided with the distribution.
** 3. Neither the name of STMicroelectronics nor the names of its contributors
** may be used to endorse or promote products derived from this software
** without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
** **
***************************************************************************** *****************************************************************************
*/ */
/* Entry Point */ /* 程序入口点 - 指定复位处理程序为程序的起始执行点 */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* Specify the memory areas */ /* 定义内存区域 */
MEMORY MEMORY
{ {
/* 数据紧耦合内存 (Data TCM) - 128KB零等待周期用于高性能数据访问 */
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 320K /* D1域RAM (AXI SRAM) - 320KB主系统内存 */
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 128K
/* D2域RAM (AHB SRAM) - 32KB用于外设数据缓冲 */
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K
/* D3域RAM (备份域RAM) - 16KB在低功耗模式下保持数据 */
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K
/* 指令紧耦合内存 (Instruction TCM) - 64KB零等待周期用于高性能代码执行 */
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
/* 主闪存 - 1024KB存储程序代码和常量数据 */
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
} }
/* Highest address of the user mode stack */ /* 定义用户模式栈的最高地址(栈向低地址增长) */
_estack = ORIGIN(DTCMRAM) + LENGTH(DTCMRAM); /* end of RAM */ _estack = ORIGIN(DTCMRAM) + LENGTH(DTCMRAM); /* RAM的末尾作为栈起始位置 */
/* Generate a link error if heap and stack don't fit into RAM */
/* 如果堆和栈不能放入RAM则生成链接错误 */
_Min_Heap_Size = 0x4000; /* required amount of heap */ _Min_Heap_Size = 0x4000; /* required amount of heap */
_Min_Stack_Size = 0x4000; /* required amount of stack */ _Min_Stack_Size = 0x4000; /* required amount of stack */
/* Define output sections */ /* 定义输出段 */
SECTIONS SECTIONS
{ {
/* The startup code goes first into FLASH */ /* 启动代码首先放入FLASH */
.isr_vector : .isr_vector :
{ {
. = ALIGN(4); . = ALIGN(4); /* 4字节对齐 */
KEEP(*(.isr_vector)) /* Startup code */ KEEP(*(.isr_vector)) /* 保留中断向量表(启动代码) */
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
/* The program code and other data goes into FLASH */ /* 程序代码和其他数据放入FLASH */
.text : .text :
{ {
. = ALIGN(4); . = ALIGN(4);
*(.text) /* .text sections (code) */ *(.text) /* 所有.text段(代码) */
*(.text*) /* .text* sections (code) */ *(.text*) /* 所有.text*段(代码) */
*(.glue_7) /* glue arm to thumb code */ *(.glue_7) /* ARM和Thumb代码粘合段 */
*(.glue_7t) /* glue thumb to arm code */ *(.glue_7t) /* Thumb和ARM代码粘合段 */
*(.eh_frame) *(.eh_frame) /* 异常处理帧信息 */
KEEP (*(.init)) KEEP (*(.init)) /* 保留初始化代码 */
KEEP (*(.fini)) KEEP (*(.fini)) /* 保留终止化代码 */
. = ALIGN(4); . = ALIGN(4);
_etext = .; /* define a global symbols at end of code */ _etext = .; /* 定义代码结束的全局符号 */
} >FLASH } >FLASH
/* Constant data goes into FLASH */ /* 常量数据放入FLASH */
.rodata : .rodata :
{ {
. = ALIGN(4); . = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */ *(.rodata) /* .rodata段(常量、字符串等) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ *(.rodata*) /* .rodata*段(常量、字符串等) */
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ /* ARM异常处理表段 */
.ARM.extab (READONLY) : /* "READONLY"关键字仅在GCC11及以后版本支持如果使用GCC10或更早版本请移除 */
{ {
. = ALIGN(4); . = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ /* ARM异常索引表段 */
.ARM (READONLY) : /* "READONLY"关键字仅在GCC11及以后版本支持如果使用GCC10或更早版本请移除 */
{ {
. = ALIGN(4); . = ALIGN(4);
__exidx_start = .; __exidx_start = .; /* 异常索引表开始 */
*(.ARM.exidx*) *(.ARM.exidx*)
__exidx_end = .; __exidx_end = .; /* 异常索引表结束 */
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ /* 预初始化数组段 */
.preinit_array (READONLY) : /* "READONLY"关键字仅在GCC11及以后版本支持如果使用GCC10或更早版本请移除 */
{ {
. = ALIGN(4); . = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .); PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -131,56 +120,59 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ /* 初始化数组段 */
.init_array (READONLY) : /* "READONLY"关键字仅在GCC11及以后版本支持如果使用GCC10或更早版本请移除 */
{ {
. = ALIGN(4); . = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .); PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*))) KEEP (*(SORT(.init_array.*))) /* 排序的初始化数组 */
KEEP (*(.init_array*)) KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ /* 终止化数组段 */
.fini_array (READONLY) : /* "READONLY"关键字仅在GCC11及以后版本支持如果使用GCC10或更早版本请移除 */
{ {
. = ALIGN(4); . = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*))) KEEP (*(SORT(.fini_array.*))) /* 排序的终止化数组 */
KEEP (*(.fini_array*)) KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .); PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
/* used by the startup to initialize data */ /* 用于启动时初始化数据的加载地址 */
_sidata = LOADADDR(.data); _sidata = LOADADDR(.data);
/* Initialized data sections goes into RAM, load LMA copy after code */ /* 已初始化数据段放入RAM但在FLASH中保留加载镜像 */
.data : .data :
{ {
. = ALIGN(4); . = ALIGN(4);
_sdata = .; /* create a global symbol at data start */ _sdata = .; /* 在数据开始处创建全局符号 */
*(.data) /* .data sections */ *(.data) /* .data */
*(.data*) /* .data* sections */ *(.data*) /* .data* */
*(.RamFunc) /* .RamFunc sections */ *(.RamFunc) /* 在RAM中执行的函数段 */
*(.RamFunc*) /* .RamFunc* sections */ *(.RamFunc*) /* 在RAM中执行的函数段 */
. = ALIGN(4); . = ALIGN(4);
} >DTCMRAM AT> FLASH _edata = .; /* 在数据结束处定义全局符号 */
} >DTCMRAM AT> FLASH /* VMA在DTCMRAMLMA在FLASH */
/* Initialized TLS data section */ /* 已初始化TLS线程局部存储数据段 */
.tdata : ALIGN(4) .tdata : ALIGN(4)
{ {
*(.tdata .tdata.* .gnu.linkonce.td.*) *(.tdata .tdata.* .gnu.linkonce.td.*)
. = ALIGN(4); . = ALIGN(4);
_edata = .; /* define a global symbol at data end */
PROVIDE(__data_end = .);
PROVIDE(__tdata_end = .); PROVIDE(__tdata_end = .);
} >DTCMRAM AT> FLASH } >DTCMRAM AT> FLASH
/* 提供TLS相关符号供启动代码和运行时使用 */
PROVIDE( __tdata_start = ADDR(.tdata) ); PROVIDE( __tdata_start = ADDR(.tdata) );
PROVIDE( __tdata_size = __tdata_end - __tdata_start ); PROVIDE( __tdata_size = __tdata_end - __tdata_start );
PROVIDE( __data_start = ADDR(.data) ); PROVIDE( __data_start = ADDR(.data) );
PROVIDE( __data_end = _edata );
PROVIDE( __data_size = __data_end - __data_start ); PROVIDE( __data_size = __data_end - __data_start );
PROVIDE( __tdata_source = LOADADDR(.tdata) ); PROVIDE( __tdata_source = LOADADDR(.tdata) );
@@ -188,23 +180,26 @@ SECTIONS
PROVIDE( __tdata_source_size = __tdata_source_end - __tdata_source ); PROVIDE( __tdata_source_size = __tdata_source_end - __tdata_source );
PROVIDE( __data_source = LOADADDR(.data) ); PROVIDE( __data_source = LOADADDR(.data) );
PROVIDE( __data_source_end = __tdata_source_end ); PROVIDE( __data_source_end = LOADADDR(.data) + SIZEOF(.data) );
PROVIDE( __data_source_size = __data_source_end - __data_source ); PROVIDE( __data_source_size = __data_source_end - __data_source );
/* Uninitialized data section */
/* 未初始化的TLS BSS段 */
.tbss (NOLOAD) : ALIGN(4) .tbss (NOLOAD) : ALIGN(4)
{ {
/* This is used by the startup in order to initialize the .bss secion */ /* 启动代码使用此符号来初始化.bss段 */
_sbss = .; /* define a global symbol at bss start */ _sbss = .; /* 在bss开始处定义全局符号 */
__bss_start__ = _sbss; __bss_start__ = _sbss;
*(.tbss .tbss.*) *(.tbss .tbss.*)
. = ALIGN(4); . = ALIGN(4);
PROVIDE( __tbss_end = . ); PROVIDE( __tbss_end = . );
} >DTCMRAM } >DTCMRAM
/* 提供TLS BSS相关符号 */
PROVIDE( __tbss_start = ADDR(.tbss) ); PROVIDE( __tbss_start = ADDR(.tbss) );
PROVIDE( __tbss_size = __tbss_end - __tbss_start ); PROVIDE( __tbss_size = __tbss_end - __tbss_start );
PROVIDE( __tbss_offset = ADDR(.tbss) - ADDR(.tdata) ); PROVIDE( __tbss_offset = ADDR(.tbss) - ADDR(.tdata) );
/* 提供TLS基础信息 */
PROVIDE( __tls_base = __tdata_start ); PROVIDE( __tls_base = __tdata_start );
PROVIDE( __tls_end = __tbss_end ); PROVIDE( __tls_end = __tbss_end );
PROVIDE( __tls_size = __tls_end - __tls_base ); PROVIDE( __tls_size = __tls_end - __tls_base );
@@ -213,41 +208,41 @@ SECTIONS
PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) ); PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) );
PROVIDE( __arm64_tls_tcb_offset = MAX(16, __tls_align) ); PROVIDE( __arm64_tls_tcb_offset = MAX(16, __tls_align) );
/* 常规BSS段未初始化数据 */
.bss (NOLOAD) : ALIGN(4) .bss (NOLOAD) : ALIGN(4)
{ {
*(.bss) *(.bss)
*(.bss*) *(.bss*)
*(COMMON) *(COMMON) /* 未初始化的全局变量 */
. = ALIGN(4); . = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */ _ebss = .; /* 在bss结束处定义全局符号 */
__bss_end__ = _ebss; __bss_end__ = _ebss;
PROVIDE( __bss_end = .); PROVIDE( __bss_end = .);
} >DTCMRAM } >DTCMRAM
PROVIDE( __non_tls_bss_start = ADDR(.bss) ); PROVIDE( __non_tls_bss_start = ADDR(.bss) );
PROVIDE( __bss_start = __tbss_start ); /* 提供完整的BSS信息包含TLS和非TLS */
PROVIDE( __bss_start = _sbss );
PROVIDE( __bss_size = __bss_end - __bss_start ); PROVIDE( __bss_size = __bss_end - __bss_start );
/* User_heap_stack section, used to check that there is enough RAM left */ /* 用户堆栈段用于检查剩余RAM是否足够 */
._user_heap_stack (NOLOAD) : ._user_heap_stack (NOLOAD) :
{ {
. = ALIGN(8); . = ALIGN(8);
PROVIDE ( end = . ); PROVIDE ( end = . ); /* 堆起始位置 */
PROVIDE ( _end = . ); PROVIDE ( _end = . );
. = . + _Min_Heap_Size; . = . + _Min_Heap_Size; /* 分配堆空间 */
. = . + _Min_Stack_Size; . = . + _Min_Stack_Size; /* 分配栈空间 */
. = ALIGN(8); . = ALIGN(8);
} >DTCMRAM } >DTCMRAM
/* 从标准库中移除调试信息 */
/* Remove information from the standard libraries */
/DISCARD/ : /DISCARD/ :
{ {
libc.a:* ( * ) libc.a:* ( * ) /* 丢弃C库的调试信息 */
libm.a:* ( * ) libm.a:* ( * ) /* 丢弃数学库的调试信息 */
libgcc.a:* ( * ) libgcc.a:* ( * ) /* 丢弃GCC库的调试信息 */
} }
} }

View File

@@ -1,6 +1,24 @@
#MicroXplorer Configuration settings - do not modify #MicroXplorer Configuration settings - do not modify
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_4
ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_4
ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV64
ADC1.ContinuousConvMode=ENABLE
ADC1.ConversionDataManagement=ADC_CONVERSIONDATA_DMA_CIRCULAR
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,master,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSignedSaturation-0\#ChannelRegularConversion,NbrOfConversionFlag,ClockPrescaler,ConversionDataManagement,ContinuousConvMode,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSignedSaturation-1\#ChannelRegularConversion,NbrOfConversion
ADC1.NbrOfConversion=2
ADC1.NbrOfConversionFlag=1
ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
ADC1.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE
ADC1.OffsetSignedSaturation-0\#ChannelRegularConversion=DISABLE
ADC1.OffsetSignedSaturation-1\#ChannelRegularConversion=DISABLE
ADC1.Rank-0\#ChannelRegularConversion=1
ADC1.Rank-1\#ChannelRegularConversion=2
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
ADC1.master=1
ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR
ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag ADC3.ClockPrescaler=ADC_CLOCK_ASYNC_DIV64
ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag,ClockPrescaler
ADC3.NbrOfConversionFlag=1 ADC3.NbrOfConversionFlag=1
ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
ADC3.OffsetSign-0\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE ADC3.OffsetSign-0\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
@@ -26,12 +44,31 @@ CRC.DefaultInitValueUse=DEFAULT_INIT_VALUE_DISABLE
CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_DISABLE CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_DISABLE
CRC.IPParameters=InputDataInversionMode,DefaultInitValueUse,DefaultPolynomialUse,CRCLength CRC.IPParameters=InputDataInversionMode,DefaultInitValueUse,DefaultPolynomialUse,CRCLength
CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_BYTE CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_BYTE
Dma.ADC1.14.Direction=DMA_PERIPH_TO_MEMORY
Dma.ADC1.14.EventEnable=DISABLE
Dma.ADC1.14.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.ADC1.14.Instance=DMA1_Stream2
Dma.ADC1.14.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.ADC1.14.MemInc=DMA_MINC_ENABLE
Dma.ADC1.14.Mode=DMA_CIRCULAR
Dma.ADC1.14.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC1.14.PeriphInc=DMA_PINC_DISABLE
Dma.ADC1.14.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.ADC1.14.Priority=DMA_PRIORITY_LOW
Dma.ADC1.14.RequestNumber=1
Dma.ADC1.14.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.ADC1.14.SignalID=NONE
Dma.ADC1.14.SyncEnable=DISABLE
Dma.ADC1.14.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.ADC1.14.SyncRequestNumber=1
Dma.ADC1.14.SyncSignalID=NONE
Dma.Request0=USART10_RX Dma.Request0=USART10_RX
Dma.Request1=USART10_TX Dma.Request1=USART10_TX
Dma.Request10=USART3_TX Dma.Request10=USART3_TX
Dma.Request11=SPI1_RX Dma.Request11=SPI1_RX
Dma.Request12=SPI1_TX Dma.Request12=SPI1_TX
Dma.Request13=UART5_RX Dma.Request13=UART5_RX
Dma.Request14=ADC1
Dma.Request2=SPI2_RX Dma.Request2=SPI2_RX
Dma.Request3=SPI2_TX Dma.Request3=SPI2_TX
Dma.Request4=UART7_RX Dma.Request4=UART7_RX
@@ -40,7 +77,7 @@ Dma.Request6=USART1_TX
Dma.Request7=USART2_RX Dma.Request7=USART2_RX
Dma.Request8=USART2_TX Dma.Request8=USART2_TX
Dma.Request9=USART3_RX Dma.Request9=USART3_RX
Dma.RequestsNb=14 Dma.RequestsNb=15
Dma.SPI1_RX.11.Direction=DMA_PERIPH_TO_MEMORY Dma.SPI1_RX.11.Direction=DMA_PERIPH_TO_MEMORY
Dma.SPI1_RX.11.EventEnable=DISABLE Dma.SPI1_RX.11.EventEnable=DISABLE
Dma.SPI1_RX.11.FIFOMode=DMA_FIFOMODE_DISABLE Dma.SPI1_RX.11.FIFOMode=DMA_FIFOMODE_DISABLE
@@ -62,7 +99,7 @@ Dma.SPI1_RX.11.SyncSignalID=NONE
Dma.SPI1_TX.12.Direction=DMA_MEMORY_TO_PERIPH Dma.SPI1_TX.12.Direction=DMA_MEMORY_TO_PERIPH
Dma.SPI1_TX.12.EventEnable=DISABLE Dma.SPI1_TX.12.EventEnable=DISABLE
Dma.SPI1_TX.12.FIFOMode=DMA_FIFOMODE_DISABLE Dma.SPI1_TX.12.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_TX.12.Instance=DMA1_Stream2 Dma.SPI1_TX.12.Instance=DMA1_Stream3
Dma.SPI1_TX.12.MemDataAlignment=DMA_MDATAALIGN_HALFWORD Dma.SPI1_TX.12.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.SPI1_TX.12.MemInc=DMA_MINC_ENABLE Dma.SPI1_TX.12.MemInc=DMA_MINC_ENABLE
Dma.SPI1_TX.12.Mode=DMA_NORMAL Dma.SPI1_TX.12.Mode=DMA_NORMAL
@@ -80,7 +117,7 @@ Dma.SPI1_TX.12.SyncSignalID=NONE
Dma.SPI2_RX.2.Direction=DMA_PERIPH_TO_MEMORY Dma.SPI2_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.SPI2_RX.2.EventEnable=DISABLE Dma.SPI2_RX.2.EventEnable=DISABLE
Dma.SPI2_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE Dma.SPI2_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI2_RX.2.Instance=DMA1_Stream3 Dma.SPI2_RX.2.Instance=DMA1_Stream0
Dma.SPI2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE Dma.SPI2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI2_RX.2.MemInc=DMA_MINC_ENABLE Dma.SPI2_RX.2.MemInc=DMA_MINC_ENABLE
Dma.SPI2_RX.2.Mode=DMA_NORMAL Dma.SPI2_RX.2.Mode=DMA_NORMAL
@@ -349,10 +386,12 @@ FDCAN3.RxFifo1ElmtsNbr=32
FDCAN3.StdFiltersNbr=1 FDCAN3.StdFiltersNbr=1
FDCAN3.TxFifoQueueElmtsNbr=6 FDCAN3.TxFifoQueueElmtsNbr=6
FREERTOS.FootprintOK=true FREERTOS.FootprintOK=true
FREERTOS.IPParameters=Tasks01,configENABLE_FPU,FootprintOK,configUSE_NEWLIB_REENTRANT,configCHECK_FOR_STACK_OVERFLOW,configUSE_MALLOC_FAILED_HOOK FREERTOS.IPParameters=Tasks01,configENABLE_FPU,FootprintOK,configUSE_NEWLIB_REENTRANT,configCHECK_FOR_STACK_OVERFLOW,configUSE_MALLOC_FAILED_HOOK,configTOTAL_HEAP_SIZE,configMINIMAL_STACK_SIZE
FREERTOS.Tasks01=BeginTask,24,256,StartDefaultTask,As weak,NULL,Dynamic,NULL,NULL;shoot,24,512,ShootTask,As weak,NULL,Dynamic,NULL,NULL;gimbal,24,512,GimbalTask,As weak,NULL,Dynamic,NULL,NULL;chassis,24,512,ChassisTask,As weak,NULL,Dynamic,NULL,NULL;init,40,256,StartInitTask,As weak,NULL,Dynamic,NULL,NULL;vision,24,512,VisionTask,As weak,NULL,Dynamic,NULL,NULL;cmd,24,512,CmdTask,As weak,NULL,Dynamic,NULL,NULL;reference,24,512,RefereeTask,As weak,NULL,Dynamic,NULL,NULL FREERTOS.Tasks01=BeginTask,24,256,StartDefaultTask,As weak,NULL,Dynamic,NULL,NULL;shoot,24,512,ShootTask,As weak,NULL,Dynamic,NULL,NULL;gimbal,24,512,GimbalTask,As weak,NULL,Dynamic,NULL,NULL;chassis,24,512,ChassisTask,As weak,NULL,Dynamic,NULL,NULL;init,40,256,StartInitTask,As weak,NULL,Dynamic,NULL,NULL;vision,24,512,VisionTask,As weak,NULL,Dynamic,NULL,NULL;cmd,24,512,CmdTask,As weak,NULL,Dynamic,NULL,NULL;reference,24,512,RefereeTask,As weak,NULL,Dynamic,NULL,NULL;WS2812Task,16,256,ws2812Task,As external,NULL,Dynamic,NULL,NULL
FREERTOS.configCHECK_FOR_STACK_OVERFLOW=2 FREERTOS.configCHECK_FOR_STACK_OVERFLOW=2
FREERTOS.configENABLE_FPU=1 FREERTOS.configENABLE_FPU=1
FREERTOS.configMINIMAL_STACK_SIZE=256
FREERTOS.configTOTAL_HEAP_SIZE=30720
FREERTOS.configUSE_MALLOC_FAILED_HOOK=1 FREERTOS.configUSE_MALLOC_FAILED_HOOK=1
FREERTOS.configUSE_NEWLIB_REENTRANT=0 FREERTOS.configUSE_NEWLIB_REENTRANT=0
File.Version=6 File.Version=6
@@ -412,102 +451,107 @@ MMTAppRegionsCount=6
MMTConfigApplied=false MMTConfigApplied=false
Mcu.CPN=STM32H723VGT6 Mcu.CPN=STM32H723VGT6
Mcu.Family=STM32H7 Mcu.Family=STM32H7
Mcu.IP0=ADC3 Mcu.IP0=ADC1
Mcu.IP1=CORTEX_M7 Mcu.IP1=ADC3
Mcu.IP10=NVIC Mcu.IP10=NVIC
Mcu.IP11=RCC Mcu.IP11=RCC
Mcu.IP12=SPI1 Mcu.IP12=SPI1
Mcu.IP13=SPI2 Mcu.IP13=SPI2
Mcu.IP14=SYS Mcu.IP14=SPI6
Mcu.IP15=TIM1 Mcu.IP15=SYS
Mcu.IP16=TIM3 Mcu.IP16=TIM1
Mcu.IP17=TIM12 Mcu.IP17=TIM3
Mcu.IP18=UART5 Mcu.IP18=TIM12
Mcu.IP19=UART7 Mcu.IP19=UART5
Mcu.IP2=CRC Mcu.IP2=CORTEX_M7
Mcu.IP20=USART1 Mcu.IP20=UART7
Mcu.IP21=USART2 Mcu.IP21=USART1
Mcu.IP22=USART3 Mcu.IP22=USART2
Mcu.IP23=USART10 Mcu.IP23=USART3
Mcu.IP24=USB_DEVICE Mcu.IP24=USART10
Mcu.IP25=USB_OTG_HS Mcu.IP25=USB_DEVICE
Mcu.IP3=DMA Mcu.IP26=USB_OTG_HS
Mcu.IP4=FDCAN1 Mcu.IP3=CRC
Mcu.IP5=FDCAN2 Mcu.IP4=DMA
Mcu.IP6=FDCAN3 Mcu.IP5=FDCAN1
Mcu.IP7=FREERTOS Mcu.IP6=FDCAN2
Mcu.IP8=IWDG1 Mcu.IP7=FDCAN3
Mcu.IP8=FREERTOS
Mcu.IP9=MEMORYMAP Mcu.IP9=MEMORYMAP
Mcu.IPNb=26 Mcu.IPNb=27
Mcu.Name=STM32H723VGTx Mcu.Name=STM32H723VGTx
Mcu.Package=LQFP100 Mcu.Package=LQFP100
Mcu.Pin0=PE2 Mcu.Pin0=PE2
Mcu.Pin1=PE3 Mcu.Pin1=PE3
Mcu.Pin10=PA0 Mcu.Pin10=PA0
Mcu.Pin11=PA2 Mcu.Pin11=PA2
Mcu.Pin12=PA6 Mcu.Pin12=PA5
Mcu.Pin13=PA7 Mcu.Pin13=PA6
Mcu.Pin14=PB1 Mcu.Pin14=PA7
Mcu.Pin15=PE7 Mcu.Pin15=PC4
Mcu.Pin16=PE8 Mcu.Pin16=PB1
Mcu.Pin17=PE9 Mcu.Pin17=PE7
Mcu.Pin18=PE10 Mcu.Pin18=PE8
Mcu.Pin19=PE12 Mcu.Pin19=PE9
Mcu.Pin2=PC14-OSC32_IN Mcu.Pin2=PC14-OSC32_IN
Mcu.Pin20=PE13 Mcu.Pin20=PE10
Mcu.Pin21=PE15 Mcu.Pin21=PE12
Mcu.Pin22=PB10 Mcu.Pin22=PE13
Mcu.Pin23=PB11 Mcu.Pin23=PE15
Mcu.Pin24=PB13 Mcu.Pin24=PB10
Mcu.Pin25=PB14 Mcu.Pin25=PB11
Mcu.Pin26=PB15 Mcu.Pin26=PB13
Mcu.Pin27=PD8 Mcu.Pin27=PB15
Mcu.Pin28=PD9 Mcu.Pin28=PD8
Mcu.Pin29=PD10 Mcu.Pin29=PD9
Mcu.Pin3=PC15-OSC32_OUT Mcu.Pin3=PC15-OSC32_OUT
Mcu.Pin30=PD12 Mcu.Pin30=PD10
Mcu.Pin31=PD13 Mcu.Pin31=PD12
Mcu.Pin32=PA8 Mcu.Pin32=PD13
Mcu.Pin33=PA9 Mcu.Pin33=PA8
Mcu.Pin34=PA10 Mcu.Pin34=PA9
Mcu.Pin35=PA11 Mcu.Pin35=PA10
Mcu.Pin36=PA12 Mcu.Pin36=PA11
Mcu.Pin37=PC10 Mcu.Pin37=PA12
Mcu.Pin38=PC11 Mcu.Pin38=PC10
Mcu.Pin39=PC12 Mcu.Pin39=PC11
Mcu.Pin4=PH0-OSC_IN Mcu.Pin4=PH0-OSC_IN
Mcu.Pin40=PD0 Mcu.Pin40=PC12
Mcu.Pin41=PD1 Mcu.Pin41=PD0
Mcu.Pin42=PD2 Mcu.Pin42=PD1
Mcu.Pin43=PD4 Mcu.Pin43=PD2
Mcu.Pin44=PD5 Mcu.Pin44=PD4
Mcu.Pin45=PD6 Mcu.Pin45=PD5
Mcu.Pin46=PD7 Mcu.Pin46=PD6
Mcu.Pin47=PB3(JTDO/TRACESWO) Mcu.Pin47=PD7
Mcu.Pin48=PB4(NJTRST) Mcu.Pin48=PB3(JTDO/TRACESWO)
Mcu.Pin49=PB5 Mcu.Pin49=PB4(NJTRST)
Mcu.Pin5=PH1-OSC_OUT Mcu.Pin5=PH1-OSC_OUT
Mcu.Pin50=PB6 Mcu.Pin50=PB5
Mcu.Pin51=VP_ADC3_TempSens_Input Mcu.Pin51=PB6
Mcu.Pin52=VP_CRC_VS_CRC Mcu.Pin52=VP_ADC3_TempSens_Input
Mcu.Pin53=VP_FREERTOS_VS_CMSIS_V2 Mcu.Pin53=VP_CRC_VS_CRC
Mcu.Pin54=VP_IWDG1_VS_IWDG Mcu.Pin54=VP_FREERTOS_VS_CMSIS_V2
Mcu.Pin55=VP_SYS_VS_tim23 Mcu.Pin55=VP_SYS_VS_tim23
Mcu.Pin56=VP_TIM1_VS_ClockSourceINT Mcu.Pin56=VP_TIM1_VS_ClockSourceINT
Mcu.Pin57=VP_TIM1_VS_no_output3 Mcu.Pin57=VP_TIM1_VS_no_output3
Mcu.Pin58=VP_USB_DEVICE_VS_USB_DEVICE_CDC_HS Mcu.Pin58=VP_USB_DEVICE_VS_USB_DEVICE_CDC_HS
Mcu.Pin59=VP_MEMORYMAP_VS_MEMORYMAP Mcu.Pin59=VP_MEMORYMAP_VS_MEMORYMAP
Mcu.Pin6=PC0 Mcu.Pin6=PC0
Mcu.Pin60=VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0
Mcu.Pin7=PC1 Mcu.Pin7=PC1
Mcu.Pin8=PC2_C Mcu.Pin8=PC2_C
Mcu.Pin9=PC3_C Mcu.Pin9=PC3_C
Mcu.PinsNb=60 Mcu.PinsNb=61
Mcu.ThirdPartyNb=0 Mcu.ThirdParty0=STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0
Mcu.ThirdPartyNb=1
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32H723VGTx Mcu.UserName=STM32H723VGTx
MxCube.Version=6.15.0 MxCube.Version=6.15.0
MxDb.Version=DB.6.0.150 MxDb.Version=DB.6.0.150
NVIC.ADC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
@@ -551,7 +595,7 @@ NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
PA0.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label PA0.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
PA0.GPIO_Label=pump1 PA0.GPIO_Label=power2
PA0.GPIO_PuPd=GPIO_PULLDOWN PA0.GPIO_PuPd=GPIO_PULLDOWN
PA0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH PA0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA0.Locked=true PA0.Locked=true
@@ -566,15 +610,17 @@ PA12.Locked=true
PA12.Mode=Device_Only_FS PA12.Mode=Device_Only_FS
PA12.Signal=USB_OTG_HS_DP PA12.Signal=USB_OTG_HS_DP
PA2.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label PA2.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
PA2.GPIO_Label=pump2 PA2.GPIO_Label=power1
PA2.GPIO_PuPd=GPIO_PULLDOWN PA2.GPIO_PuPd=GPIO_PULLDOWN
PA2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH PA2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA2.Locked=true PA2.Locked=true
PA2.PinState=GPIO_PIN_SET PA2.PinState=GPIO_PIN_SET
PA2.Signal=GPIO_Output PA2.Signal=GPIO_Output
PA5.Mode=TX_Only_Simplex_Unidirect_Master
PA5.Signal=SPI6_SCK
PA6.Mode=Full_Duplex_Master PA6.Mode=Full_Duplex_Master
PA6.Signal=SPI6_MISO PA6.Signal=SPI6_MISO
PA7.Mode=Full_Duplex_Master PA7.Mode=TX_Only_Simplex_Unidirect_Master
PA7.Signal=SPI6_MOSI PA7.Signal=SPI6_MOSI
PA8.Mode=Clock-out-1 PA8.Mode=Clock-out-1
PA8.Signal=RCC_MCO_1 PA8.Signal=RCC_MCO_1
@@ -601,8 +647,6 @@ PB13.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PB13.Locked=true PB13.Locked=true
PB13.Mode=Full_Duplex_Master PB13.Mode=Full_Duplex_Master
PB13.Signal=SPI2_SCK PB13.Signal=SPI2_SCK
PB14.Mode=Hardware Flow Control (RS485)
PB14.Signal=USART3_DE
PB15.Signal=S_TIM12_CH2 PB15.Signal=S_TIM12_CH2
PB3(JTDO/TRACESWO).Locked=true PB3(JTDO/TRACESWO).Locked=true
PB3(JTDO/TRACESWO).Mode=Full_Duplex_Master PB3(JTDO/TRACESWO).Mode=Full_Duplex_Master
@@ -648,6 +692,8 @@ PC3_C.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PC3_C.Locked=true PC3_C.Locked=true
PC3_C.PinState=GPIO_PIN_SET PC3_C.PinState=GPIO_PIN_SET
PC3_C.Signal=GPIO_Output PC3_C.Signal=GPIO_Output
PC4.Locked=true
PC4.Signal=ADCx_INP4
PD0.Mode=FDCAN_Activate PD0.Mode=FDCAN_Activate
PD0.Signal=FDCAN1_RX PD0.Signal=FDCAN1_RX
PD1.Mode=FDCAN_Activate PD1.Mode=FDCAN_Activate
@@ -753,7 +799,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath= ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_FDCAN2_Init-FDCAN2-false-HAL-true,5-MX_FDCAN3_Init-FDCAN3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,8-MX_FDCAN1_Init-FDCAN1-false-HAL-true,9-MX_USART10_UART_Init-USART10-false-HAL-true,10-MX_SPI2_Init-SPI2-false-HAL-true,11-MX_TIM12_Init-TIM12-false-HAL-true,12-MX_UART7_Init-UART7-false-HAL-true,13-MX_TIM1_Init-TIM1-false-HAL-true,14-MX_USART1_UART_Init-USART1-false-HAL-true,15-MX_ADC3_Init-ADC3-false-HAL-true,16-MX_USART2_UART_Init-USART2-false-HAL-true,17-MX_USART3_UART_Init-USART3-false-HAL-true,18-MX_SPI1_Init-SPI1-false-HAL-true,19-MX_UART5_Init-UART5-false-HAL-true,20-MX_TIM3_Init-TIM3-false-HAL-true,21-MX_IWDG1_Init-IWDG1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_FDCAN2_Init-FDCAN2-false-HAL-true,5-MX_FDCAN3_Init-FDCAN3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,8-MX_FDCAN1_Init-FDCAN1-false-HAL-true,9-MX_USART10_UART_Init-USART10-false-HAL-true,10-MX_SPI2_Init-SPI2-false-HAL-true,11-MX_TIM12_Init-TIM12-false-HAL-true,12-MX_UART7_Init-UART7-false-HAL-true,13-MX_TIM1_Init-TIM1-false-HAL-true,14-MX_USART1_UART_Init-USART1-false-HAL-true,15-MX_ADC3_Init-ADC3-false-HAL-true,16-MX_USART2_UART_Init-USART2-false-HAL-true,17-MX_USART3_UART_Init-USART3-false-HAL-true,18-MX_SPI1_Init-SPI1-false-HAL-true,19-MX_UART5_Init-UART5-false-HAL-true,20-MX_TIM3_Init-TIM3-false-HAL-true,21-MX_SPI6_Init-SPI6-false-HAL-true,22-MX_ADC1_Init-ADC1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
RCC.ADCFreq_Value=96000000 RCC.ADCFreq_Value=96000000
RCC.AHB12Freq_Value=240000000 RCC.AHB12Freq_Value=240000000
RCC.AHB4Freq_Value=240000000 RCC.AHB4Freq_Value=240000000
@@ -837,6 +883,8 @@ RCC.VCO3OutputFreq_Value=96750000
RCC.VCOInput1Freq_Value=12000000 RCC.VCOInput1Freq_Value=12000000
RCC.VCOInput2Freq_Value=12000000 RCC.VCOInput2Freq_Value=12000000
RCC.VCOInput3Freq_Value=750000 RCC.VCOInput3Freq_Value=750000
SH.ADCx_INP4.0=ADC1_INP4,IN4-Single-Ended
SH.ADCx_INP4.ConfNb=1
SH.GPXTI10.0=GPIO_EXTI10 SH.GPXTI10.0=GPIO_EXTI10
SH.GPXTI10.ConfNb=1 SH.GPXTI10.ConfNb=1
SH.GPXTI12.0=GPIO_EXTI12 SH.GPXTI12.0=GPIO_EXTI12
@@ -865,6 +913,18 @@ SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRate
SPI2.Mode=SPI_MODE_MASTER SPI2.Mode=SPI_MODE_MASTER
SPI2.NSSPMode=SPI_NSS_PULSE_ENABLE SPI2.NSSPMode=SPI_NSS_PULSE_ENABLE
SPI2.VirtualType=VM_MASTER SPI2.VirtualType=VM_MASTER
SPI6.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4
SPI6.CLKPhase=SPI_PHASE_2EDGE
SPI6.CalculateBaudRate=6.0 MBits/s
SPI6.DataSize=SPI_DATASIZE_8BIT
SPI6.Direction=SPI_DIRECTION_2LINES_TXONLY
SPI6.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler,CLKPhase
SPI6.Mode=SPI_MODE_MASTER
SPI6.VirtualType=VM_MASTER
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.DSPOoLibraryJjLibrary_Checked=true
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.IPParameters=LibraryCcDSPOoLibraryJjDSPOoLibrary
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.LibraryCcDSPOoLibraryJjDSPOoLibrary=true
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0_SwParameter=LibraryCcDSPOoLibraryJjDSPOoLibrary\:true;
TIM1.Channel-PWM\ Generation3\ No\ Output=TIM_CHANNEL_3 TIM1.Channel-PWM\ Generation3\ No\ Output=TIM_CHANNEL_3
TIM1.IPParameters=Channel-PWM Generation3 No Output,Prescaler,Period TIM1.IPParameters=Channel-PWM Generation3 No Output,Prescaler,Period
TIM1.Period=1999 TIM1.Period=1999
@@ -903,10 +963,9 @@ USART2.OverrunDisableParam=ADVFEATURE_OVERRUN_DISABLE
USART2.VirtualMode-Asynchronous=VM_ASYNC USART2.VirtualMode-Asynchronous=VM_ASYNC
USART2.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC USART2.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC
USART3.BaudRate=4800000 USART3.BaudRate=4800000
USART3.IPParameters=VirtualMode-Asynchronous,VirtualMode-Hardware Flow Control (RS485),BaudRate,OverrunDisableParam USART3.IPParameters=VirtualMode-Asynchronous,BaudRate,OverrunDisableParam
USART3.OverrunDisableParam=ADVFEATURE_OVERRUN_DISABLE USART3.OverrunDisableParam=ADVFEATURE_OVERRUN_DISABLE
USART3.VirtualMode-Asynchronous=VM_ASYNC USART3.VirtualMode-Asynchronous=VM_ASYNC
USART3.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC
USB_DEVICE.CLASS_NAME_HS=CDC USB_DEVICE.CLASS_NAME_HS=CDC
USB_DEVICE.IPParameters=VirtualMode,VirtualModeHS,CLASS_NAME_HS USB_DEVICE.IPParameters=VirtualMode,VirtualModeHS,CLASS_NAME_HS
USB_DEVICE.VirtualMode=Cdc USB_DEVICE.VirtualMode=Cdc
@@ -919,10 +978,10 @@ VP_CRC_VS_CRC.Mode=CRC_Activate
VP_CRC_VS_CRC.Signal=CRC_VS_CRC VP_CRC_VS_CRC.Signal=CRC_VS_CRC
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
VP_IWDG1_VS_IWDG.Mode=IWDG_Activate
VP_IWDG1_VS_IWDG.Signal=IWDG1_VS_IWDG
VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0.Mode=DSPOoLibraryJjLibrary
VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0.Signal=STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0
VP_SYS_VS_tim23.Mode=TIM23 VP_SYS_VS_tim23.Mode=TIM23
VP_SYS_VS_tim23.Signal=SYS_VS_tim23 VP_SYS_VS_tim23.Signal=SYS_VS_tim23
VP_TIM1_VS_ClockSourceINT.Mode=Internal VP_TIM1_VS_ClockSourceINT.Mode=Internal

View File

@@ -31,7 +31,8 @@
/* USER CODE BEGIN PV */ /* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
static USBCallback tx_cbk = NULL;
static USBCallback rx_cbk = NULL;
/* USER CODE END PV */ /* USER CODE END PV */
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
@@ -123,9 +124,13 @@ extern USBD_HandleTypeDef hUsbDeviceHS;
*/ */
static int8_t CDC_Init_HS(void); static int8_t CDC_Init_HS(void);
static int8_t CDC_DeInit_HS(void); static int8_t CDC_DeInit_HS(void);
static int8_t CDC_Control_HS(uint8_t cmd, uint8_t* pbuf, uint16_t length);
static int8_t CDC_Receive_HS(uint8_t* pbuf, uint32_t *Len); static int8_t CDC_Control_HS(uint8_t cmd, uint8_t *pbuf, uint16_t length);
static int8_t CDC_Receive_HS(uint8_t *pbuf, uint32_t *Len);
static int8_t CDC_TransmitCplt_HS(uint8_t *pbuf, uint32_t *Len, uint8_t epnum); static int8_t CDC_TransmitCplt_HS(uint8_t *pbuf, uint32_t *Len, uint8_t epnum);
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ /* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
@@ -138,11 +143,11 @@ static int8_t CDC_TransmitCplt_HS(uint8_t *pbuf, uint32_t *Len, uint8_t epnum);
USBD_CDC_ItfTypeDef USBD_Interface_fops_HS = USBD_CDC_ItfTypeDef USBD_Interface_fops_HS =
{ {
CDC_Init_HS, CDC_Init_HS,
CDC_DeInit_HS, CDC_DeInit_HS,
CDC_Control_HS, CDC_Control_HS,
CDC_Receive_HS, CDC_Receive_HS,
CDC_TransmitCplt_HS CDC_TransmitCplt_HS
}; };
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
@@ -153,12 +158,12 @@ USBD_CDC_ItfTypeDef USBD_Interface_fops_HS =
*/ */
static int8_t CDC_Init_HS(void) static int8_t CDC_Init_HS(void)
{ {
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* Set Application Buffers */ /* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceHS, UserTxBufferHS, 0); USBD_CDC_SetTxBuffer(&hUsbDeviceHS, UserTxBufferHS, 0);
USBD_CDC_SetRxBuffer(&hUsbDeviceHS, UserRxBufferHS); USBD_CDC_SetRxBuffer(&hUsbDeviceHS, UserRxBufferHS);
return (USBD_OK); return (USBD_OK);
/* USER CODE END 8 */ /* USER CODE END 8 */
} }
/** /**
@@ -168,9 +173,9 @@ static int8_t CDC_Init_HS(void)
*/ */
static int8_t CDC_DeInit_HS(void) static int8_t CDC_DeInit_HS(void)
{ {
/* USER CODE BEGIN 9 */ /* USER CODE BEGIN 9 */
return (USBD_OK); return (USBD_OK);
/* USER CODE END 9 */ /* USER CODE END 9 */
} }
/** /**
@@ -180,70 +185,70 @@ static int8_t CDC_DeInit_HS(void)
* @param length: Number of data to be sent (in bytes) * @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/ */
static int8_t CDC_Control_HS(uint8_t cmd, uint8_t* pbuf, uint16_t length) static int8_t CDC_Control_HS(uint8_t cmd, uint8_t *pbuf, uint16_t length)
{ {
/* USER CODE BEGIN 10 */ /* USER CODE BEGIN 10 */
switch(cmd) switch (cmd)
{ {
case CDC_SEND_ENCAPSULATED_COMMAND: case CDC_SEND_ENCAPSULATED_COMMAND:
break; break;
case CDC_GET_ENCAPSULATED_RESPONSE: case CDC_GET_ENCAPSULATED_RESPONSE:
break; break;
case CDC_SET_COMM_FEATURE: case CDC_SET_COMM_FEATURE:
break; break;
case CDC_GET_COMM_FEATURE: case CDC_GET_COMM_FEATURE:
break; break;
case CDC_CLEAR_COMM_FEATURE: case CDC_CLEAR_COMM_FEATURE:
break; break;
/*******************************************************************************/ /*******************************************************************************/
/* Line Coding Structure */ /* Line Coding Structure */
/*-----------------------------------------------------------------------------*/ /*-----------------------------------------------------------------------------*/
/* Offset | Field | Size | Value | Description */ /* Offset | Field | Size | Value | Description */
/* 0 | dwDTERate | 4 | Number |Data terminal rate, in bits per second*/ /* 0 | dwDTERate | 4 | Number |Data terminal rate, in bits per second*/
/* 4 | bCharFormat | 1 | Number | Stop bits */ /* 4 | bCharFormat | 1 | Number | Stop bits */
/* 0 - 1 Stop bit */ /* 0 - 1 Stop bit */
/* 1 - 1.5 Stop bits */ /* 1 - 1.5 Stop bits */
/* 2 - 2 Stop bits */ /* 2 - 2 Stop bits */
/* 5 | bParityType | 1 | Number | Parity */ /* 5 | bParityType | 1 | Number | Parity */
/* 0 - None */ /* 0 - None */
/* 1 - Odd */ /* 1 - Odd */
/* 2 - Even */ /* 2 - Even */
/* 3 - Mark */ /* 3 - Mark */
/* 4 - Space */ /* 4 - Space */
/* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */ /* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */
/*******************************************************************************/ /*******************************************************************************/
case CDC_SET_LINE_CODING: case CDC_SET_LINE_CODING:
break; break;
case CDC_GET_LINE_CODING: case CDC_GET_LINE_CODING:
break; break;
case CDC_SET_CONTROL_LINE_STATE: case CDC_SET_CONTROL_LINE_STATE:
break; break;
case CDC_SEND_BREAK: case CDC_SEND_BREAK:
break; break;
default: default:
break; break;
} }
return (USBD_OK); return (USBD_OK);
/* USER CODE END 10 */ /* USER CODE END 10 */
} }
/** /**
@@ -261,13 +266,13 @@ static int8_t CDC_Control_HS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
* @param Len: Number of data received (in bytes) * @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAILL * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAILL
*/ */
static int8_t CDC_Receive_HS(uint8_t* Buf, uint32_t *Len) static int8_t CDC_Receive_HS(uint8_t *Buf, uint32_t *Len)
{ {
/* USER CODE BEGIN 11 */ /* USER CODE BEGIN 11 */
USBD_CDC_SetRxBuffer(&hUsbDeviceHS, &Buf[0]); USBD_CDC_SetRxBuffer(&hUsbDeviceHS, &Buf[0]);
USBD_CDC_ReceivePacket(&hUsbDeviceHS); USBD_CDC_ReceivePacket(&hUsbDeviceHS);
return (USBD_OK); return (USBD_OK);
/* USER CODE END 11 */ /* USER CODE END 11 */
} }
/** /**
@@ -277,18 +282,19 @@ static int8_t CDC_Receive_HS(uint8_t* Buf, uint32_t *Len)
* @param Len: Number of data to be sent (in bytes) * @param Len: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/ */
uint8_t CDC_Transmit_HS(uint8_t* Buf, uint16_t Len) uint8_t CDC_Transmit_HS(uint8_t *Buf, uint16_t Len)
{ {
uint8_t result = USBD_OK; uint8_t result = USBD_OK;
/* USER CODE BEGIN 12 */ /* USER CODE BEGIN 12 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceHS.pClassData; USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) hUsbDeviceHS.pClassData;
if (hcdc->TxState != 0){ if (hcdc->TxState != 0)
return USBD_BUSY; {
} return USBD_BUSY;
USBD_CDC_SetTxBuffer(&hUsbDeviceHS, Buf, Len); }
result = USBD_CDC_TransmitPacket(&hUsbDeviceHS); USBD_CDC_SetTxBuffer(&hUsbDeviceHS, Buf, Len);
/* USER CODE END 12 */ result = USBD_CDC_TransmitPacket(&hUsbDeviceHS);
return result; /* USER CODE END 12 */
return result;
} }
/** /**
@@ -305,16 +311,24 @@ uint8_t CDC_Transmit_HS(uint8_t* Buf, uint16_t Len)
*/ */
static int8_t CDC_TransmitCplt_HS(uint8_t *Buf, uint32_t *Len, uint8_t epnum) static int8_t CDC_TransmitCplt_HS(uint8_t *Buf, uint32_t *Len, uint8_t epnum)
{ {
uint8_t result = USBD_OK; uint8_t result = USBD_OK;
/* USER CODE BEGIN 14 */ /* USER CODE BEGIN 14 */
UNUSED(Buf); UNUSED(Buf);
UNUSED(Len); UNUSED(Len);
UNUSED(epnum); UNUSED(epnum);
/* USER CODE END 14 */ if (tx_cbk)
return result; tx_cbk(*Len);
/* USER CODE END 14 */
return result;
} }
/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */ /* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */
uint8_t *CDCInitRxbufferNcallback(USBCallback transmit_cbk, USBCallback recv_cbk)
{
tx_cbk = transmit_cbk;
rx_cbk = recv_cbk;
return UserRxBufferHS;
}
/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */ /* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */

View File

@@ -24,7 +24,11 @@
#define __USBD_CDC_IF_H__ #define __USBD_CDC_IF_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C"
{
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@@ -65,6 +69,7 @@
*/ */
/* USER CODE BEGIN EXPORTED_TYPES */ /* USER CODE BEGIN EXPORTED_TYPES */
typedef void (*USBCallback)(uint16_t);
/* USER CODE END EXPORTED_TYPES */ /* USER CODE END EXPORTED_TYPES */
@@ -106,9 +111,10 @@ extern USBD_CDC_ItfTypeDef USBD_Interface_fops_HS;
* @{ * @{
*/ */
uint8_t CDC_Transmit_HS(uint8_t* Buf, uint16_t Len); uint8_t CDC_Transmit_HS(uint8_t *Buf, uint16_t Len);
/* USER CODE BEGIN EXPORTED_FUNCTIONS */ /* USER CODE BEGIN EXPORTED_FUNCTIONS */
uint8_t *CDCInitRxbufferNcallback(USBCallback transmit_cbk, USBCallback recv_cbk);
/* USER CODE END EXPORTED_FUNCTIONS */ /* USER CODE END EXPORTED_FUNCTIONS */

View File

@@ -0,0 +1,193 @@
/**
* @file ws2812Task.c
* @brief WS2812 LED control task
* @author TuxMonkey (nqx2004@gmail.com)
* @version 1.0
* @date 2025-07-08
*
* @copyright Copyright (c) 2025 DLMU-C.ONE
*
* @par 修改日志:
* <table>
* <tr><th>Date <th>Version <th>Author <th>Description
* <tr><td>2025-07-08 <td>1.0 <td>TuxMonkey <td>内容
* </table>
*/
//真的有点抽象了不太清楚什么问题24V的时候用16的分频器可以 5V时候就只能用32的分频器了 spi6的 这个之后注意一下吧 如果要开发还是用32的分频器。
/*---------------------INCLUDES----------------------*/
#include "ws2812status.h"
#include "ws2812.h"
#include "cmsis_os.h"
#include "tim.h"
#include "delayticks.h"
#include "robot_def.h"
/*---------------------VARIABLES---------------------*/
uint8_t r = 0;
uint8_t g = 0;
uint8_t b = 0;
/*---------------------FUNCTIONS---------------------*/
void robotSelfCheck(void)
{
WS2812_Ctrl(255, 0, 0);
HAL_Delay(300);
WS2812_Ctrl(0, 0, 255);
HAL_Delay(300);
WS2812_Ctrl(0, 255, 0);
HAL_Delay(300);
WS2812_Ctrl(0, 255, 0);
}
/**
* @brief WS2812 LED control task
* @param argument
*/
void ws2812Task(void *argument)
{
(void) argument;
RobotMode_t RobotMode = REMOTE_NOT_CONNECTED; // 初始状态为遥控器未连接
while (1)
{
switch (RobotMode)
{
case NORMAL_MODE:
BlinkGreen();
break;
case SYS_ERROR_OCCURRED:
BlinkRed();
break;
case REMOTE_NOT_CONNECTED:
BlinkYellow();
break;
case REMOTE_CONNECTED:
BlinkBlue();
break;
case AUTO_SHOOTING_MODE:
BlinkCyan();
break;
case IMU_CALIBERATION_MODE:
BlinkPurple();
break;
default:
BlinkYellow();
}
osDelay(10); // 每个任务最后都要写在while里要不然会导致任务切换失败
}
}
void BlinkYellow(void)
{
r = 255; // 红色分量
g = 255; // 绿色分量
b = 0; // 蓝色分量
WS2812_Ctrl(r, g, b); // 设置为黄色
delay_ticks(500); // 延时500毫秒
WS2812_Ctrl(0, 0, 0); // 关闭LED灯
delay_ticks(500); // 延时500毫秒
}
void BlinkRed(void)
{
r = 255; // 红色分量
g = 0; // 绿色分量
b = 0; // 蓝色分量
WS2812_Ctrl(r, g, b); // 设置为红色
delay_ticks(500); // 延时500毫秒
WS2812_Ctrl(0, 0, 0); // 关闭LED灯
delay_ticks(500); // 延时500毫秒
}
void BlinkGreen(void)
{
r = 0; // 红色分量
g = 255; // 绿色分量
b = 0; // 蓝色分量
WS2812_Ctrl(r, g, b); // 设置为绿色
delay_ticks(500); // 延时500毫秒
WS2812_Ctrl(0, 0, 0); // 关闭LED灯
delay_ticks(500); // 延时500毫秒
}
void BlinkBlue(void)
{
r = 0; // 红色分量
g = 0; // 绿色分量
b = 255; // 蓝色分量
WS2812_Ctrl(r, g, b); // 设置为蓝色
delay_ticks(500); // 延时500毫秒
WS2812_Ctrl(0, 0, 0); // 关闭LED灯
delay_ticks(500); // 延时500毫秒
}
void BlinkWhite(void)
{
r = 255; // 红色分量
g = 255; // 绿色分量
b = 255; // 蓝色分量
WS2812_Ctrl(r, g, b); // 设置为白色
delay_ticks(500); // 延时500毫秒
WS2812_Ctrl(0, 0, 0); // 关闭LED灯
delay_ticks(500); // 延时500毫秒
}
void BlinkCyan(void)
{
r = 0; // 红色分量
g = 255; // 绿色分量
b = 255; // 蓝色分量
WS2812_Ctrl(r, g, b); // 设置为青色
delay_ticks(500); // 延时500毫秒
WS2812_Ctrl(0, 0, 0); // 关闭LED灯
delay_ticks(500); // 延时500毫秒
}
void BlinkPurple(void)
{
r = 255; // 红色分量
g = 0; // 绿色分量
b = 255; // 蓝色分量
WS2812_Ctrl(r, g, b); // 设置为紫色
delay_ticks(500); // 延时500毫秒
WS2812_Ctrl(0, 0, 0); // 关闭LED灯
delay_ticks(500); // 延时500毫秒
}
void PWMControwLed(void)
{
//
// WS2812_Ctrl(r, g, b);
// r++;
// g += 5;
// b += 10;
// r=0;g=255;b=0;//绿色
// WS2812_Ctrl(r, g, b);
// delay_ticks(500); // 使用延时函数代替osDelay避免任务切换失败
// r=0;g=0;b=255;//蓝色
// WS2812_Ctrl(r, g, b);
// delay_ticks(500);
// r=0;g=255;b=255;//青色
// WS2812_Ctrl(r, g, b);
// delay_ticks(500);
// r=255;g=0;b=255;//紫色
// WS2812_Ctrl(r, g, b);
// delay_ticks(500);
// r=255;g=255;b=255;
// WS2812_Ctrl(r, g, b);
// delay_ticks(1000);
// osDelay(1);
// osDelay(100);
}

View File

@@ -0,0 +1,29 @@
#ifndef ws2812status_H
#define ws2812status_H
/*---------------------INCLUDES----------------------*/
#include "main.h"
#include "cmsis_os.h"
#include "tim.h"
#include "ws2812.h"
/*---------------------FUNCTIONS---------------------*/
void ws2812Task(void *argument);
void robotSelfCheck(void);
void BlinkYellow(void);
void BlinkRed(void);
void BlinkBlue(void);
void BlinkGreen(void);
void BlinkWhite(void);
void BlinkCyan(void);
void BlinkPurple(void);
#endif

View File

@@ -0,0 +1,86 @@
/**
* @file robot.c
* @brief
* @author TuxMonkey (nqx2004@gmail.com)
* @version 1.0
* @date 2025-07-08
*
* @copyright Copyright (c) 2025 DLMU-C.ONE
*
* @par 修改日志:
* <table>
* <tr><th>Date <th>Version <th>Author <th>Description
* <tr><td>2025-07-08 <td>1.0 <td>TuxMonkey <td>内容
* </table>
*/
#include "bsp_init.h"
#include "robot.h"
#include "cmsis_gcc.h"
// #include "robot_def.h"
// #include "robot_task.h"
// // 编译warning,提醒开发者修改机器人参数
// #ifndef ROBOT_DEF_PARAM_WARNING
// #define ROBOT_DEF_PARAM_WARNING
// #pragma message "check if you have configured the parameters in robot_def.h, IF NOT, please refer to the comments AND DO IT, otherwise the robot will have FATAL ERRORS!!!"
// #endif // !ROBOT_DEF_PARAM_WARNING
// #if defined(ONE_BOARD) || defined(CHASSIS_BOARD)
// #include "chassis.h"
// #endif
// #if defined(ONE_BOARD) || defined(GIMBAL_BOARD)
// #include "gimbal.h"
// #include "shoot.h"
// #include "robot_cmd.h"
// #endif
/**
* @brief 机器人初始化函数
*
* @note 该函数在系统启动时调用,用于初始化机器人各个模块
*
* @attention 请不要在初始化过程中使用中断和延时函数!
* 若必须,则只允许使用DWT_Delay()
*/
void RobotInit()
{
// 关闭中断,防止在初始化过程中发生中断
// 请不要在初始化过程中使用中断和延时函数!
// 若必须,则只允许使用DWT_Delay()
__disable_irq();
BSPInit();
#if defined(ONE_BOARD) || defined(GIMBAL_BOARD)
RobotCMDInit();
// GimbalInit();
// ShootInit();
#endif
#if defined(ONE_BOARD) || defined(CHASSIS_BOARD)
ChassisInit();
#endif
// OSTaskInit(); // 创建基础任务
// 初始化完成,开启中断
__enable_irq();
}
// void RobotTask()
// {
// #if defined(ONE_BOARD) || defined(GIMBAL_BOARD)
// RobotCMDTask();
// // GimbalTask();
// // ShootTask();
// #endif
// #if defined(ONE_BOARD) || defined(CHASSIS_BOARD)
// ChassisTask();
// #endif
// }

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@@ -0,0 +1,18 @@
#ifndef ROBOT_H
#define ROBOT_H
/* Robot利用robot_def.h中的宏对不同的机器人进行了大量的兼容,同时兼容了两个开发板(云台板和底盘板)的配置 */
/**
* @brief 机器人初始化,请在开启rtos之前调用.这也是唯一需要放入main函数的函数
*
*/
void RobotInit();
/**
* @brief 机器人任务,放入实时系统以一定频率运行,内部会调用各个应用的任务
*
*/
void RobotTask();
#endif

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@@ -0,0 +1,48 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : bsp_adc.c
* @brief : bsp adc functions
* @author : TuxMonkey
* @date : 2025/11/22
* @version : v1.0
******************************************************************************
* @attention : Pay attention to enable the adc
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "bsp_adc.h"
#include "adc.h"
/**
* @brief ADC sampling voltage array
*/
__attribute__((section (".AXI_SRAM"))) uint16_t ADC_Voltage_Val[2];
/**
* @brief Configures the ADC.
* @param None
* @retval None
*/
void BSP_ADC_Init(void)
{
HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED);
HAL_ADC_Start_DMA(&hadc1, (uint32_t *) ADC_Voltage_Val, 2);
}
//------------------------------------------------------------------------------
/**
* @brief USER get current voltage.
* @param None
* @retval Voltage
*/
float USER_ADC_Voltage_Update(void)
{
auto Voltage = (ADC_Voltage_Val[0] * 3.3f / 65535) * 11.0f;
return Voltage;
}
//------------------------------------------------------------------------------

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@@ -0,0 +1,34 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : bsp_adc.h
* @brief : The header file of bsp_adc.h
* @author : TuxMonkey
* @date : 2025/11/22
* @version : v1.0
******************************************************************************
* @attention : Pay attention to config the clock source of the advanced TIM
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef BSP_ADC_H
#define BSP_ADC_H
#ifdef __cplusplus
extern "C"
{
#endif
/* Includes ------------------------------------------------------------------*/
#include "adc.h"
/* Externs ---------------------------------------------*/
void BSP_ADC_Init(void);
float USER_ADC_Voltage_Update(void);
#endif //BSP_ADC_H

22
User_Code/bsp/bsp_init.h Normal file
View File

@@ -0,0 +1,22 @@
#ifndef BSP_INIT_h
#define BSP_INIT_h
#include "bsp_init.h"
// #include "bsp_log.h"
#include "bsp_dwt.h"
// #include "bsp_usb.h"
/**
* @brief bsp层初始化统一入口,这里仅初始化必须的bsp组件,其他组件的初始化在各自的模块中进行
* 需在实时系统启动前调用,目前由RobotoInit()调用
*
* @note 其他实例型的外设如CAN和串口会在注册实例的时候自动初始化,不注册不初始化
*/
void BSPInit()
{
DWT_Init(480); //Todo:修改这里以适配喵板cpufreq
// BSPLogInit();
}
#endif // !BSP_INIT_h

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@@ -0,0 +1,39 @@
#include "delayticks.h"
/*延时函数,不会将任务挂起*/
void delay_ticks(uint32_t delay)
{
/*开始计数器值*/
uint32_t tickstart = xTaskGetTickCount();
/*指定延时时间*/
uint32_t wait = delay;
/*计算当前计数器值和开始计数器值的差*/
uint32_t ticks_diff = xTaskGetTickCount() - tickstart;
if ( ticks_diff < wait )
{
/*计算剩余等待的时间*/
uint32_t remaining_ticks = wait - ticks_diff;
/*循环等待,直到剩余时间结束*/
while ( ( xTaskGetTickCount() - tickstart) < wait )
{
/*如果发生溢出,则重新计算时间差*/
if ( xTaskGetTickCount() < tickstart )
{
/*重新计算时间差*/
ticks_diff = UINT32_MAX - tickstart + xTaskGetTickCount();
if ( ticks_diff < wait )
{
remaining_ticks = wait - ticks_diff;
}
else
{
/*如果时间差已经大于等于等待时间,则退出*/
break;
}
}
}
}
}

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@@ -0,0 +1,10 @@
#ifndef DELAYTICKS_H
#define DELAYTICKS_H
#include "main.h"
#include "cmsis_os.h"
#include "tim.h"
extern void delay_ticks(uint32_t delay);
#endif

View File

@@ -0,0 +1,5 @@
//
// Created by tuxmonkey on 2025/10/28.
//
#include "bsp_dmaMalloc.h"

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//
// Created by tuxmonkey on 2025/10/28.
//
#ifndef TRONONEH7_SCAFFOLD_BSP_DMAMALLOC_H
#define TRONONEH7_SCAFFOLD_BSP_DMAMALLOC_H
#endif //TRONONEH7_SCAFFOLD_BSP_DMAMALLOC_H

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/**
* @file bsp_dwt.c
* @brief DWT延时 软件延时库
* @author TuxMonkey (nqx2004@gmail.com)
* @version 1.0
* @date 2025-07-08
*
* @copyright Copyright (c) 2025 DLMU-C.ONE
*
* @par 修改日志:
* <table>
* <tr><th>Date <th>Version <th>Author <th>Description
* <tr><td>2025-07-08 <td>1.0 <td>TuxMonkey <td>内容
* </table>
*/
#include "bsp_dwt.h"
#include "cmsis_os.h"
static DWT_Time_t SysTime;
static uint32_t CPU_FREQ_Hz, CPU_FREQ_Hz_ms, CPU_FREQ_Hz_us;
static uint32_t CYCCNT_RountCount;
static uint32_t CYCCNT_LAST;
static uint64_t CYCCNT64;
/**
* @brief 私有函数,用于检查DWT CYCCNT寄存器是否溢出,并更新CYCCNT_RountCount
* @attention 此函数假设两次调用之间的时间间隔不超过一次溢出
*
* @todo 更好的方案是为dwt的时间更新单独设置一个任务?
* 不过,使用dwt的初衷是定时不被中断/任务等因素影响,因此该实现仍然有其存在的意义
*
*/
static void DWT_CNT_Update(void)
{
static volatile uint8_t bit_locker = 0;
if (!bit_locker)
{
bit_locker = 1;
volatile uint32_t cnt_now = DWT->CYCCNT;
if (cnt_now < CYCCNT_LAST)
CYCCNT_RountCount++;
CYCCNT_LAST = DWT->CYCCNT;
bit_locker = 0;
}
}
void DWT_Init(uint32_t CPU_Freq_mHz)
{
/* 使能DWT外设 */
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
/* DWT CYCCNT寄存器计数清0 */
DWT->CYCCNT = (uint32_t) 0u;
/* 使能Cortex-M DWT CYCCNT寄存器 */
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
CPU_FREQ_Hz = CPU_Freq_mHz * 1000000;
CPU_FREQ_Hz_ms = CPU_FREQ_Hz / 1000;
CPU_FREQ_Hz_us = CPU_FREQ_Hz / 1000000;
CYCCNT_RountCount = 0;
DWT_CNT_Update();
}
float DWT_GetDeltaT(uint32_t *cnt_last)
{
volatile uint32_t cnt_now = DWT->CYCCNT;
float dt = ((uint32_t) (cnt_now - *cnt_last)) / ((float) (CPU_FREQ_Hz));
*cnt_last = cnt_now;
DWT_CNT_Update();
return dt;
}
double DWT_GetDeltaT64(uint32_t *cnt_last)
{
volatile uint32_t cnt_now = DWT->CYCCNT;
double dt = ((uint32_t) (cnt_now - *cnt_last)) / ((double) (CPU_FREQ_Hz));
*cnt_last = cnt_now;
DWT_CNT_Update();
return dt;
}
void DWT_SysTimeUpdate(void)
{
volatile uint32_t cnt_now = DWT->CYCCNT;
static uint64_t CNT_TEMP1, CNT_TEMP2, CNT_TEMP3;
DWT_CNT_Update();
CYCCNT64 = (uint64_t) CYCCNT_RountCount * (uint64_t) UINT32_MAX + (uint64_t) cnt_now;
CNT_TEMP1 = CYCCNT64 / CPU_FREQ_Hz;
CNT_TEMP2 = CYCCNT64 - CNT_TEMP1 * CPU_FREQ_Hz;
SysTime.s = CNT_TEMP1;
SysTime.ms = CNT_TEMP2 / CPU_FREQ_Hz_ms;
CNT_TEMP3 = CNT_TEMP2 - SysTime.ms * CPU_FREQ_Hz_ms;
SysTime.us = CNT_TEMP3 / CPU_FREQ_Hz_us;
}
float DWT_GetTimeline_s(void)
{
DWT_SysTimeUpdate();
float DWT_Timelinef32 = SysTime.s + SysTime.ms * 0.001f + SysTime.us * 0.000001f;
return DWT_Timelinef32;
}
float DWT_GetTimeline_ms(void)
{
DWT_SysTimeUpdate();
float DWT_Timelinef32 = SysTime.s * 1000 + SysTime.ms + SysTime.us * 0.001f;
return DWT_Timelinef32;
}
uint64_t DWT_GetTimeline_us(void)
{
DWT_SysTimeUpdate();
uint64_t DWT_Timelinef32 = SysTime.s * 1000000 + SysTime.ms * 1000 + SysTime.us;
return DWT_Timelinef32;
}
void DWT_Delay(float Delay)
{
uint32_t tickstart = DWT->CYCCNT;
float wait = Delay;
while ((DWT->CYCCNT - tickstart) < wait * (float) CPU_FREQ_Hz);
}

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/**
* @file bsp_dwt.h
* @brief DWT延时 软件延时库头文件
* @author TuxMonkey (nqx2004@gmail.com)
* @version 1.0
* @date 2025-07-08
*
* @copyright Copyright (c) 2025 DLMU-C.ONE
*
* @par 修改日志:
* <table>
* <tr><th>Date <th>Version <th>Author <th>Description
* <tr><td>2025-07-08 <td>1.0 <td>TuxMonkey <td>内容
* </table>
*/
#ifndef _BSP_DWT_H
#define _BSP_DWT_H
#include "main.h"
#include "stdint.h"
#include "bsp_log.h"
typedef struct
{
uint32_t s;
uint16_t ms;
uint16_t us;
} DWT_Time_t;
/**
* @brief 该宏用于计算代码段执行时间,单位为秒/s,返回值为float类型
* 首先需要创建一个float类型的变量,用于存储时间间隔
* 计算得到的时间间隔同时还会通过RTT打印到日志终端,你也可以将你的dt变量添加到查看
*/
#define TIME_ELAPSE(dt, code) \
do \
{ \
float tstart = DWT_GetTimeline_s(); \
code; \
dt = DWT_GetTimeline_s() - tstart; \
LOGINFO("[DWT] " #dt " = %f s\r\n", dt); \
} while (0)
/**
* @brief 初始化DWT,传入参数为CPU频率,单位MHz
*
* @param CPU_Freq_mHz c板为168MHz,A板为180MHz
*/
void DWT_Init(uint32_t CPU_Freq_mHz);
/**
* @brief 获取两次调用之间的时间间隔,单位为秒/s
*
* @param cnt_last 上一次调用的时间戳
* @return float 时间间隔,单位为秒/s
*/
float DWT_GetDeltaT(uint32_t *cnt_last);
/**
* @brief 获取两次调用之间的时间间隔,单位为秒/s,高精度
*
* @param cnt_last 上一次调用的时间戳
* @return double 时间间隔,单位为秒/s
*/
double DWT_GetDeltaT64(uint32_t *cnt_last);
/**
* @brief 获取当前时间,单位为秒/s,即初始化后的时间
*
* @return float 时间轴
*/
float DWT_GetTimeline_s(void);
/**
* @brief 获取当前时间,单位为毫秒/ms,即初始化后的时间
*
* @return float
*/
float DWT_GetTimeline_ms(void);
/**
* @brief 获取当前时间,单位为微秒/us,即初始化后的时间
*
* @return uint64_t
*/
uint64_t DWT_GetTimeline_us(void);
/**
* @brief DWT延时函数,单位为秒/s
* @attention 该函数不受中断是否开启的影响,可以在临界区和关闭中断时使用
* @note 禁止在__disable_irq()和__enable_irq()之间使用HAL_Delay()函数,应使用本函数
*
* @param Delay 延时时间,单位为秒/s
*/
void DWT_Delay(float Delay);
/**
* @brief DWT更新时间轴函数,会被三个timeline函数调用
* @attention 如果长时间不调用timeline函数,则需要手动调用该函数更新时间轴,否则CYCCNT溢出后定时和时间轴不准确
*/
void DWT_SysTimeUpdate(void);
#endif /* BSP_DWT_H_ */

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# bsp_dwt
DWT是stm32内部的一个"隐藏资源",他的用途是给下载器提供准确的定时,从而为调试信息加上时间戳.并在固定的时间间隔将调试数据发送到你的xxlink上.
## 常用功能
### 计算两次进入同一个函数的时间间隔
```c
static uint32_t cnt;
float deltaT;
deltaT=DWT_GetDeltaT(&cnt);
```
### 计算执行某部分代码的耗时
```c
float start,end;
start=DWT_DetTimeline_ms();
// some proc to go...
for(uint8_t i=0;i<10;i++)
foo();
end = DWT_DetTimeline_ms()-start;
```
我们还提供了一个宏用于调试计时:
```c
#define TIME_ELAPSE(dt, code) \
do \
{ \
float tstart = DWT_GetTimeline_s(); \
code; \
dt = DWT_GetTimeline_s() - tstart; \
LOGINFO("[DWT] " #dt " = %f s\r\n", dt); \
} while (0)
```
传入一个float类型的变量,并将你要执行的代码写入第二个参数:
```c
static float my_func_dt;
TIME_ELAPSE(my_func_dt,
Function1(vara);
Function2(some, var);
Function3(your,param);
// something more
);
// my_func_dt can be used for other purpose then;
```

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#include "bsp_fdcan.h"
#include "main.h"
#include "memory.h"
#include "stdlib.h"
#include "bsp_dwt.h"
#include "bsp_log.h"
/* can instance ptrs storage, used for recv callback */
// 在CAN产生接收中断会遍历数组,选出hcan和rxid与发生中断的实例相同的那个,调用其回调函数
// @todo: 后续为每个CAN总线单独添加一个can_instance指针数组,提高回调查找的性能
static FDCANInstance *fdcan_instance[CAN_MX_REGISTER_CNT] = {NULL};
static uint8_t idx; // 全局CAN实例索引,每次有新的模块注册会自增
/* ----------------two static function called by CANRegister()-------------------- */
/**
* @brief 添加过滤器以实现对特定id的报文的接收,会被CANRegister()调用
* 给CAN添加过滤器后,BxCAN会根据接收到的报文的id进行消息过滤,符合规则的id会被填入FIFO触发中断
* 对于FDCAN设置使用特定ID模式过滤。
*
* @note f407的bxCAN有28个过滤器,这里将其配置为前14个过滤器给CAN1使用,后14个被CAN2使用
* 初始化时,奇数id的模块会被分配到FIFO0,偶数id的模块会被分配到FIFO1
* 注册到CAN1的模块使用过滤器0-13,CAN2使用过滤器14-27
* FDCAN的消息RAM是所有FDCAN外设共用的。
* H723系列FDCAN过滤器数量完全在CubeMX中自定义因此先做一次检查再添加即可。
*
* @attention 你不需要完全理解这个函数的作用,因为它主要是用于初始化,在开发过程中不需要关心底层的实现
* 享受开发的乐趣吧!如果你真的想知道这个函数在干什么,请联系作者或自己查阅资料(请直接查阅官方的reference manual)
* FDCAN的教程较少但是添加FDCAN的人已经发了一篇CSDN讲解了可以参考一下
*
* @param _instance can instance owned by specific module
*/
static void CANAddFilter(FDCANInstance *_instance)
{
#ifdef FDCAN
static uint8_t can1_filter_idx = 0, can2_filter_idx = 0 , can3_filter_idx = 0;
//检查是否超出过滤器设定数量上限
if(can1_filter_idx > hfdcan1.Init.StdFiltersNbr || can2_filter_idx>hfdcan2.Init.StdFiltersNbr || can3_filter_idx > hfdcan3.Init.StdFiltersNbr)
{
while(1)
{
//报错
}
}
uint8_t *filter_idx_p;
if(_instance->can_handle==&hfdcan1)
{
filter_idx_p=&can1_filter_idx;
}
else if(_instance->can_handle==&hfdcan2)
{
filter_idx_p=&can2_filter_idx;
}
else if(_instance->can_handle==&hfdcan3)
{
filter_idx_p=&can3_filter_idx;
}
else
{
while(1)
{
//报错
}
}
FDCAN_FilterTypeDef fdcan_filter_conf;
fdcan_filter_conf.FilterIndex=(*filter_idx_p)++;
//使用单个ID模式
fdcan_filter_conf.FilterType=FDCAN_FILTER_DUAL;
fdcan_filter_conf.FilterConfig=(_instance->tx_id & 1) ? FDCAN_FILTER_TO_RXFIFO0 : FDCAN_FILTER_TO_RXFIFO1;//奇数id的模块会被分配到FIFO0,偶数id的模块会被分配到FIFO1
fdcan_filter_conf.FilterID1=_instance->rx_id;
fdcan_filter_conf.FilterID2=_instance->rx_id;
fdcan_filter_conf.IdType=FDCAN_STANDARD_ID;
fdcan_filter_conf.IsCalibrationMsg=0;
//fdcan_filter_conf.RxBufferIndex=0;
HAL_FDCAN_ConfigFilter(_instance->can_handle, &fdcan_filter_conf);
#else
CAN_FilterTypeDef can_filter_conf;
static uint8_t can1_filter_idx = 0, can2_filter_idx = 14; // 0-13给can1用,14-27给can2用
can_filter_conf.FilterMode = CAN_FILTERMODE_IDLIST; // 使用id list模式,即只有将rxid添加到过滤器中才会接收到,其他报文会被过滤
can_filter_conf.FilterScale = CAN_FILTERSCALE_16BIT; // 使用16位id模式,即只有低16位有效
can_filter_conf.FilterFIFOAssignment = (_instance->tx_id & 1) ? CAN_RX_FIFO0 : CAN_RX_FIFO1; // 奇数id的模块会被分配到FIFO0,偶数id的模块会被分配到FIFO1
can_filter_conf.SlaveStartFilterBank = 14; // 从第14个过滤器开始配置从机过滤器(在STM32的BxCAN控制器中CAN2是CAN1的从机)
can_filter_conf.FilterIdLow = _instance->rx_id << 5; // 过滤器寄存器的低16位,因为使用STDID,所以只有低11位有效,高5位要填0
can_filter_conf.FilterBank = _instance->can_handle == &hcan1 ? (can1_filter_idx++) : (can2_filter_idx++); // 根据can_handle判断是CAN1还是CAN2,然后自增
can_filter_conf.FilterActivation = CAN_FILTER_ENABLE; // 启用过滤器
HAL_CAN_ConfigFilter(_instance->can_handle, &can_filter_conf);
#endif
}
/**
* @brief 在第一个CAN实例初始化的时候会自动调用此函数,启动CAN服务
*
* @note 此函数会启动CAN1并开启中断
* FDCAN的情况下我们采用FIFO接收方式而不是bufferFIFO和buffer还有queue接收方式请自行查阅H723手册
* FDCAN比bxCAN多了一个全局过滤器这里配置为全部拒绝只接受指定ID。
*
*/
void CANServiceInit()
{
#ifdef FDCAN
//可能不需要这么多中断
uint32_t FDCAN_RXActiveITs = FDCAN_IT_RX_FIFO0_NEW_MESSAGE|FDCAN_IT_RX_FIFO0_FULL\
|FDCAN_IT_RX_FIFO0_WATERMARK|FDCAN_IT_RX_FIFO0_MESSAGE_LOST \
|FDCAN_IT_RX_FIFO1_NEW_MESSAGE| FDCAN_IT_RX_FIFO1_FULL\
|FDCAN_IT_RX_FIFO1_WATERMARK|FDCAN_IT_RX_FIFO1_MESSAGE_LOST;
//HAL_FDCAN_ConfigClockCalibration()
HAL_FDCAN_ConfigRxFifoOverwrite(&hfdcan1,FDCAN_RX_FIFO0,FDCAN_RX_FIFO_OVERWRITE);
HAL_FDCAN_ConfigRxFifoOverwrite(&hfdcan1,FDCAN_RX_FIFO1,FDCAN_RX_FIFO_OVERWRITE);
HAL_FDCAN_ConfigGlobalFilter(&hfdcan1, FDCAN_REJECT, FDCAN_REJECT, FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE);//全局过滤器设置
HAL_FDCAN_Start(&hfdcan1);
HAL_FDCAN_ActivateNotification(&hfdcan1,FDCAN_RXActiveITs, 0);
HAL_FDCAN_ConfigRxFifoOverwrite(&hfdcan2,FDCAN_RX_FIFO0,FDCAN_RX_FIFO_OVERWRITE);
HAL_FDCAN_ConfigRxFifoOverwrite(&hfdcan2,FDCAN_RX_FIFO1,FDCAN_RX_FIFO_OVERWRITE);
HAL_FDCAN_ConfigGlobalFilter(&hfdcan2, FDCAN_REJECT, FDCAN_REJECT, FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE);
HAL_FDCAN_Start(&hfdcan2);
HAL_FDCAN_ActivateNotification(&hfdcan2,FDCAN_RXActiveITs, 0);
HAL_FDCAN_ConfigRxFifoOverwrite(&hfdcan3,FDCAN_RX_FIFO0,FDCAN_RX_FIFO_OVERWRITE);
HAL_FDCAN_ConfigRxFifoOverwrite(&hfdcan3,FDCAN_RX_FIFO1,FDCAN_RX_FIFO_OVERWRITE);
HAL_FDCAN_ConfigGlobalFilter(&hfdcan3, FDCAN_REJECT, FDCAN_REJECT, FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE);
HAL_FDCAN_Start(&hfdcan3);
HAL_FDCAN_ActivateNotification(&hfdcan3,FDCAN_RXActiveITs, 0);
#else
HAL_CAN_Start(&hcan1);
HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING);
HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO1_MSG_PENDING);
HAL_CAN_Start(&hcan2);
HAL_CAN_ActivateNotification(&hcan2, CAN_IT_RX_FIFO0_MSG_PENDING);
HAL_CAN_ActivateNotification(&hcan2, CAN_IT_RX_FIFO1_MSG_PENDING);
#endif
}
/* ----------------------- two extern callable function -----------------------*/
FDCANInstance *CANRegister(FDCAN_Init_Config_s *config)
{
if (!idx)
{
CANServiceInit(); // 第一次注册,先进行硬件初始化
LOGINFO("[bsp_can] CAN Service Init");
}
if (idx >= CAN_MX_REGISTER_CNT) // 超过最大实例数
{
while (1)
{
LOGERROR("[bsp_can] CAN instance exceeded MAX num, consider balance the load of CAN bus");
}
}
for (size_t i = 0; i < idx; i++)
{ // 重复注册 | id重复
if (fdcan_instance[i]->rx_id == config->rx_id && fdcan_instance[i]->can_handle == config->can_handle)
{
while (1)
{
LOGERROR("[}bsp_can] CAN id crash ,tx [%d] or rx [%d] already registered", &config->tx_id, &config->rx_id);
}
}
}
FDCANInstance *instance = (FDCANInstance *)malloc(sizeof(FDCANInstance)); // 分配空间
memset(instance, 0, sizeof(FDCANInstance)); // 分配的空间未必是0,所以要先清空
// 进行发送报文的配置
#ifdef FDCAN
instance->txconf.Identifier = config->tx_id; // 发送id
instance->txconf.IdType = FDCAN_STANDARD_ID; // 使用标准id,扩展id则使用CAN_ID_EXT(目前没有需求)
instance->txconf.TxFrameType = FDCAN_DATA_FRAME, // 发送数据帧
instance->txconf.DataLength = FDCAN_DLC_BYTES_8, // 数据长度为8字节
instance->txconf.ErrorStateIndicator = FDCAN_ESI_ACTIVE, // 兼容CAN2.0,错误状态指示器设为主动
instance->txconf.BitRateSwitch = FDCAN_BRS_OFF, // 兼容CAN2.0禁用位速率切换
instance->txconf.FDFormat = FDCAN_CLASSIC_CAN, // 使用经典CAN格式
instance->txconf.TxEventFifoControl = FDCAN_NO_TX_EVENTS, // 不需要禁用事件FIFO
instance->txconf.MessageMarker = 0; // 不使用消息标记
#else
instance->txconf.StdId = config->tx_id; // 发送id
instance->txconf.IDE = CAN_ID_STD; // 使用标准id,扩展id则使用CAN_ID_EXT(目前没有需求)
instance->txconf.RTR = CAN_RTR_DATA; // 发送数据帧
instance->txconf.DLC = 0x08; // 默认发送长度为8
#endif
// 设置回调函数和接收发送id
instance->can_handle = config->can_handle;
instance->tx_id = config->tx_id; // 好像没用,可以删掉
instance->rx_id = config->rx_id;
instance->can_module_callback = config->can_module_callback;
instance->id = config->id;
CANAddFilter(instance); // 添加CAN过滤器规则
fdcan_instance[idx++] = instance; // 将实例保存到can_instance中
return instance; // 返回can实例指针
}
/* @todo 目前似乎封装过度,应该添加一个指向tx_buff的指针,tx_buff不应该由CAN instance保存 */
/* 如果让CANinstance保存txbuff,会增加一次复制的开销 */
uint8_t CANTransmit(FDCANInstance *_instance, float timeout)
{
static uint32_t busy_count;
static volatile float wait_time __attribute__((unused)); // for cancel warning
float dwt_start = DWT_GetTimeline_ms();
#ifdef FDCAN
while(HAL_FDCAN_GetTxFifoFreeLevel(_instance->can_handle)==0)
#else
while (HAL_CAN_GetTxMailboxesFreeLevel(_instance->can_handle) == 0) // 等待邮箱空闲
#endif
{
if (DWT_GetTimeline_ms() - dwt_start > timeout) // 超时
{
LOGWARNING("[bsp_can] CAN MAILbox full! failed to add msg to mailbox. Cnt [%d]", busy_count);
busy_count++;
return 0;
}
}
wait_time = DWT_GetTimeline_ms() - dwt_start;
#ifdef FDCAN
if (HAL_FDCAN_AddMessageToTxFifoQ(_instance->can_handle, &_instance->txconf, _instance->tx_buff))
#else
// tx_mailbox会保存实际填入了这一帧消息的邮箱,但是知道是哪个邮箱发的似乎也没啥用
if (HAL_CAN_AddTxMessage(_instance->can_handle, &_instance->txconf, _instance->tx_buff, &_instance->tx_mailbox))
#endif
{
LOGWARNING("[bsp_can] CAN bus BUSY! cnt:%d", busy_count);
busy_count++;
return 0;
}
return 1; // 发送成功
}
void CANSetDLC(FDCANInstance *_instance, uint8_t length)
{
// 发送长度错误!检查调用参数是否出错,或出现野指针/越界访问
if (length > 8 || length == 0) // 安全检查
while (1)
{
LOGERROR("[bsp_can] CAN DLC error! check your code or wild pointer");
}
_instance->txconf.DataLength = length;
}
/* -----------------------belows are callback definitions--------------------------*/
//对于FDCAN回调函数和处理方式完全不同因此直接用两套逻辑处理
#ifdef FDCAN
/**
* @brief 此函数会被下面两个函数调用,用于处理FIFO0和FIFO1溢出中断(说明收到了新的数据)
* 所有的实例都会被遍历,找到can_handle和rx_id相等的实例时,调用该实例的回调函数
*
* @param _fdhcan
* @param fifox passed to HAL_CAN_GetRxMessage() to get mesg from a specific fifo
*/
static void FDCANFIFOxCallback(FDCAN_HandleTypeDef *_hfdcan, uint32_t fifox)
{
static FDCAN_RxHeaderTypeDef rxconf; // 同上
static uint16_t DataLength = 0;
static uint8_t fdcan_rx_buff[8];
while (HAL_FDCAN_GetRxFifoFillLevel(_hfdcan, fifox)) // FIFO不为空,有可能在其他中断时有多帧数据进入
{
HAL_FDCAN_GetRxMessage(_hfdcan, fifox, &rxconf, fdcan_rx_buff); // 从FIFO中获取数据
//解析数据长度,@Todo 此处在用新版本重新生成后可能得修改DataLength可能不需要右移具体情况具体看
if(((rxconf.DataLength >> 16) & 0xF)>=0 && ((rxconf.DataLength >> 16) & 0xF)<=8)
{
DataLength=(rxconf.DataLength >> 16) & 0xF; // 保存接收到的数据长度
}
else
{
DataLength=0;
}
if(rxconf.RxFrameType==FDCAN_DATA_FRAME && rxconf.IdType==FDCAN_STANDARD_ID)
{
for (size_t i = 0; i < idx; ++i)
{
// 两者相等说明这是要找的实例
if (_hfdcan == fdcan_instance[i]->can_handle && rxconf.Identifier == fdcan_instance[i]->rx_id)
{
if (fdcan_instance[i]->can_module_callback != NULL) // 回调函数不为空就调用
{
fdcan_instance[i]->rx_len = DataLength; // 保存接收到的数据长度
memcpy(fdcan_instance[i]->rx_buff, fdcan_rx_buff, fdcan_instance[i]->rx_len); // 消息拷贝到对应实例
fdcan_instance[i]->can_module_callback(fdcan_instance[i]); // 触发回调进行数据解析和处理
}
return;
}
}
}
}
}
void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
{
/* 检查Rx FIFO 0中是否有消息丢失 */
if ((RxFifo0ITs & FDCAN_IT_RX_FIFO0_MESSAGE_LOST) != 0)
{
//报错
}
/* 检查是否有新消息写入Rx FIFO 0或到达一定阈值 */
if ((RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE)||(RxFifo0ITs & FDCAN_IT_RX_FIFO0_FULL)||(RxFifo0ITs & FDCAN_IT_RX_FIFO0_WATERMARK))
{
FDCANFIFOxCallback(hfdcan, FDCAN_RX_FIFO0); // 调用我们自己写的函数来处理消息
}
}
void HAL_FDCAN_RxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs)
{
/* 检查Rx FIFO 1中是否有消息丢失 */
if ((RxFifo1ITs & FDCAN_IT_RX_FIFO1_MESSAGE_LOST) != 0)
{
//报错
}
/* 检查是否有新消息写入Rx FIFO 1或到达一定阈值 */
if ((RxFifo1ITs & FDCAN_IT_RX_FIFO1_NEW_MESSAGE)||(RxFifo1ITs & FDCAN_IT_RX_FIFO1_FULL)||(RxFifo1ITs & FDCAN_IT_RX_FIFO1_WATERMARK))
{
FDCANFIFOxCallback(hfdcan, FDCAN_RX_FIFO1); // 调用我们自己写的函数来处理消息
}
}
#else
/**
* @brief 此函数会被下面两个函数调用,用于处理FIFO0和FIFO1溢出中断(说明收到了新的数据)
* 所有的实例都会被遍历,找到can_handle和rx_id相等的实例时,调用该实例的回调函数
*
* @param _hcan
* @param fifox passed to HAL_CAN_GetRxMessage() to get mesg from a specific fifo
*/
static void CANFIFOxCallback(CAN_HandleTypeDef *_hcan, uint32_t fifox)
{
static CAN_RxHeaderTypeDef rxconf; // 同上
uint8_t can_rx_buff[8];
while (HAL_CAN_GetRxFifoFillLevel(_hcan, fifox)) // FIFO不为空,有可能在其他中断时有多帧数据进入
{
HAL_CAN_GetRxMessage(_hcan, fifox, &rxconf, can_rx_buff); // 从FIFO中获取数据
for (size_t i = 0; i < idx; ++i)
{ // 两者相等说明这是要找的实例
if (_hcan == fdcan_instance[i]->can_handle && rxconf.StdId == fdcan_instance[i]->rx_id)
{
if (fdcan_instance[i]->can_module_callback != NULL) // 回调函数不为空就调用
{
fdcan_instance[i]->rx_len = rxconf.DLC; // 保存接收到的数据长度
memcpy(fdcan_instance[i]->rx_buff, can_rx_buff, rxconf.DLC); // 消息拷贝到对应实例
fdcan_instance[i]->can_module_callback(fdcan_instance[i]); // 触发回调进行数据解析和处理
}
return;
}
}
}
}
/**
* @brief 注意,STM32的两个CAN设备共享两个FIFO
* 下面两个函数是HAL库中的回调函数,他们被HAL声明为__weak,这里对他们进行重载(重写)
* 当FIFO0或FIFO1溢出时会调用这两个函数
*/
// 下面的函数会调用CANFIFOxCallback()来进一步处理来自特定CAN设备的消息
/**
* @brief rx fifo callback. Once FIFO_0 is full,this func would be called
*
* @param hcan CAN handle indicate which device the oddest mesg in FIFO_0 comes from
*/
void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)
{
CANFIFOxCallback(hcan, CAN_RX_FIFO0); // 调用我们自己写的函数来处理消息
}
/**
* @brief rx fifo callback. Once FIFO_1 is full,this func would be called
*
* @param hcan CAN handle indicate which device the oddest mesg in FIFO_1 comes from
*/
void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan)
{
CANFIFOxCallback(hcan, CAN_RX_FIFO1); // 调用我们自己写的函数来处理消息
}
#endif

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#ifndef BSP_CAN_H
#define BSP_CAN_H
//在此选择CAN类型两者只能选择一个
#define FDCAN //G系列和H7系列使用FDCAN
//#define BXCAN //F系列使用BxCAN
//CAN类型宏定义检查有错误停止编译
#if !defined(FDCAN) && !defined(BXCAN)
#error "Neither FDCAN nor BXCAN is defined. Please define one of them."
#elif defined(FDCAN) && defined(BXCAN)
#error "Both FDCAN and BXCAN are defined. Please define only one."
#endif
#include <stdint.h>
#ifdef FDCAN
#include "fdcan.h"
#define hcan1 hfdcan1
#define hcan2 hfdcan2
#define hcan3 hfdcan3
#define CAN_MX_REGISTER_CNT 16 // 这个数量取决于CAN总线的负载
#define MX_CAN_FILTER_CNT (3 * 14) // 最多可以使用的CAN过滤器数量,目前远不会用到这么多
#define DEVICE_CAN_CNT 3 //H723VG有3个FDCAN
#endif
#ifdef BXCAN
#include "can.h"
// 最多能够支持的CAN设备数
#define CAN_MX_REGISTER_CNT 16 // 这个数量取决于CAN总线的负载
#define MX_CAN_FILTER_CNT (2 * 14) // 最多可以使用的CAN过滤器数量,目前远不会用到这么多
#define DEVICE_CAN_CNT 2 // 根据板子设定,F407IG有CAN1,CAN2,因此为2;F334只有一个,则设为1
// 如果只有1个CAN,还需要把bsp_can.c中所有的hcan2变量改为hcan1(别担心,主要是总线和FIFO的负载均衡,不影响功能)
#endif
/* can instance typedef, every module registered to CAN should have this variable */
#pragma pack(1)
typedef struct _
{
#ifdef FDCAN
FDCAN_HandleTypeDef *can_handle; // can句柄
FDCAN_TxHeaderTypeDef txconf; // CAN报文发送配置
#else
CAN_HandleTypeDef *can_handle; // can句柄
CAN_TxHeaderTypeDef txconf; // CAN报文发送配置
#endif
uint32_t tx_id; // 发送id
uint32_t tx_mailbox; // CAN消息填入的邮箱号
uint8_t tx_buff[8]; // 发送缓存,发送消息长度可以通过CANSetDLC()设定,最大为8
uint8_t rx_buff[8]; // 接收缓存,最大消息长度为8
uint32_t rx_id; // 接收id
uint8_t rx_len; // 接收长度,可能为0-8
// 接收的回调函数,用于解析接收到的数据
void (*can_module_callback)(struct _ *); // callback needs an instance to tell among registered ones
void *id; // 使用can外设的模块指针(即id指向的模块拥有此can实例,是父子关系)
} FDCANInstance;
#pragma pack()
/* CAN实例初始化结构体,将此结构体指针传入注册函数 */
typedef struct
{
#ifdef FDCAN
FDCAN_HandleTypeDef *can_handle; // can句柄
#else
CAN_HandleTypeDef *can_handle; // can句柄
#endif
uint32_t tx_id; // 发送id
uint32_t rx_id; // 接收id
void (*can_module_callback)(FDCANInstance *); // 处理接收数据的回调函数
void *id; // 拥有can实例的模块地址,用于区分不同的模块(如果有需要的话),如果不需要可以不传入
} FDCAN_Init_Config_s;
/**
* @brief Register a module to CAN service,remember to call this before using a CAN device
* 注册(初始化)一个can实例,需要传入初始化配置的指针.
* @param config init config
* @return CANInstance* can instance owned by module
*/
FDCANInstance *CANRegister(FDCAN_Init_Config_s *config);
/**
* @brief 修改CAN发送报文的数据帧长度;注意最大长度为8,在没有进行修改的时候,默认长度为8
*
* @param _instance 要修改长度的can实例
* @param length 设定长度
*/
void CANSetDLC(FDCANInstance *_instance, uint8_t length);
/**
* @brief transmit mesg through CAN device,通过can实例发送消息
* 发送前需要向CAN实例的tx_buff写入发送数据
*
* @attention 超时时间不应该超过调用此函数的任务的周期,否则会导致任务阻塞
*
* @param timeout 超时时间,单位为ms;后续改为us,获得更精确的控制
* @param _instance* can instance owned by module
*/
uint8_t CANTransmit(FDCANInstance *_instance,float timeout);
#endif

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# bsp_fdcan.c/bsp_fdcan.h
> 请注意使用FDCAN设备的时候务必保证总线只接入了2个终端电阻开发板一般都有一个6020电机、c620/c610电调、LK电机也都有终端电阻注意把多于2个的全部断开通过拨码
## 使用说明
若你希望新增一个基于FDCAN的module首先在该模块下应该有一个包含`FDCANInstance`指针的module结构体或当功能简单的时候可以是单独存在的
`FDCANInstance`,但不推荐这样做)。
## 代码结构
.h文件内包括了外部接口和类型定义,以及模块对应的宏。c文件内为私有函数和外部接口的定义。
## 类型定义
```c
#define CAN_MX_REGISTER_CNT 16 // 最大FDCAN设备注册数量
#define MX_CAN_FILTER_CNT (3 * 14) // 最多可以使用的CAN过滤器数量支持3个CAN
#define DEVICE_CAN_CNT 3 // FDCAN1, FDCAN2, FDCAN3
#define CAN_CLASS 0 // 经典CAN模式
#define CAN_FD_BRS 1 // CAN FD模式
#define CAN_BR_125K 0 // 125Kbps
#define CAN_BR_200K 1 // 200Kbps
#define CAN_BR_250K 2 // 250Kbps
#define CAN_BR_500K 3 // 500Kbps
#define CAN_BR_1M 4 // 1Mbps
#define CAN_BR_2M 5 // 2Mbps
#define CAN_BR_2M5 6 // 2.5Mbps
#define CAN_BR_3M2 7 // 3.2Mbps
#define CAN_BR_4M 8 // 4Mbps
#define CAN_BR_5M 9 // 5Mbps
/* FDCAN实例结构体每个注册到FDCAN的模块都应该有这个变量 */
typedef struct _FDCANInstance
{
FDCAN_HandleTypeDef *can_handle; // FDCAN句柄
FDCAN_TxHeaderTypeDef txconf; // FDCAN报文发送配置
uint32_t tx_id; // 发送id
uint32_t tx_mailbox; // FDCAN消息填入的邮箱号
uint8_t tx_buff[64]; // 发送缓存FDCAN最大支持64字节
uint8_t rx_buff[64]; // 接收缓存FDCAN最大支持64字节
uint32_t rx_id; // 接收id
uint8_t rx_len; // 接收长度
// 接收的回调函数,用于解析接收到的数据
void (*can_module_callback)(struct _FDCANInstance *); // 回调函数需要实例来区分注册的设备
void *id; // 使用FDCAN外设的模块指针
} FDCANInstance;
/* FDCAN实例初始化结构体 */
typedef struct
{
FDCAN_HandleTypeDef *can_handle; // FDCAN句柄
uint32_t tx_id; // 发送id
uint32_t rx_id; // 接收id
void (*can_module_callback)(FDCANInstance *); // 处理接收数据的回调函数
void *id; // 拥有FDCAN实例的模块地址
} FDCAN_Init_Config_s;
typedef void (*fdcan_callback)(FDCANInstance *);
```
- `CAN_MX_REGISTER_CNT`是最大的FDCAN设备注册数量当每个设备的发送频率都较高时设备过多会产生总线拥塞从而出现丢包和数据错误的情况。
- `MX_CAN_FILTER_CNT`是最大的FDCAN接收过滤器数量三个FDCAN共享多个过滤器。当前为简单起见每个过滤器只设置一组规则用于控制一个id的过滤。
- `DEVICE_CAN_CNT`是MCU拥有的FDCAN硬件数量H7有3个
- `FDCANInstance`
是一个FDCAN实例。注意FDCAN作为一个总线设备一条总线上可以挂载多个设备因此多个设备可以共享同一个FDCAN硬件。其成员变量包括发送id发送邮箱发送buff以及接收buff还有接收id和接收协议解析回调函数。
**FDCAN支持最大64字节的数据帧**因此收发buff长度设置为64字节。
- `FDCAN_Init_Config_s`是用于初始化FDCAN实例的结构在调用FDCAN实例的初始化函数时传入。
- `can_module_callback()`是模块提供给FDCAN接收中断回调函数使用的协议解析函数指针。对于每个需要FDCAN的模块需要定义一个这样的函数用于解包数据。
- 每个使用FDCAN外设的module都需要在其内部定义一个`FDCANInstance*`
## 外部接口
```c
FDCANInstance *FDCANRegister(FDCAN_Init_Config_s *config);
void FDCANSetDLC(FDCANInstance *_instance, uint8_t length);
uint8_t FDCANTransmit(FDCANInstance *_instance, float timeout);
void bsp_fdcan_set_baud(FDCAN_HandleTypeDef *hfdcan, uint8_t mode, uint8_t baud);
```
`FDCANRegister`是用于初始化FDCAN实例的接口module层的模块对象也应当为一个结构体内要包含一个`FDCANInstance`
。调用时传入初始化配置的指针。`FDCANRegister`应当在module的初始化函数内被调用推荐config采用以下的方式定义更加直观明了
```c
FDCAN_Init_Config_s config = {
.can_handle = &hfdcan1,
.tx_id = 0x005,
.rx_id = 0x200,
.can_module_callback = MotorCallback,
.id = (void*)motor_ptr
};
```
`FDCANTransmit()`是通过模块通过其拥有的FDCAN实例发送数据的接口调用时传入对应的instance。在发送之前应当给instance内的
`tx_buff`赋值。
`bsp_fdcan_set_baud()`用于设置FDCAN的波特率和模式经典CAN或CAN FD
## 私有函数和变量
在.c文件内设为static的函数和变量
```c
static FDCANInstance *fdcan_instance[CAN_MX_REGISTER_CNT] = {NULL};
```
这是bsp层管理所有FDCAN实例的入口。
```c
static void FDCANServiceInit()
static void FDCANAddFilter(FDCANInstance *_instance)
static void FDCANFIFOxCallback(FDCAN_HandleTypeDef *_hcan, uint32_t fifox)
static uint8_t FDCANDlcToLen(uint32_t dlc)
static uint32_t FDCANLenToDlc(uint8_t len)
void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
void HAL_FDCAN_RxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs)
void HAL_FDCAN_ErrorStatusCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t ErrorStatusITs)
```
- `FDCANServiceInit()`会被`FDCANRegister()`调用对FDCAN外设进行硬件初始化并开启接收中断和消息提醒。
- `FDCANAddFilter()`在每次使用`FDCANRegister()`的时候被调用,用于给当前注册的实例添加过滤器规则并设定处理对应`rx_id`
的接收FIFO。过滤器的作用是减小FDCAN收发器的压力只接收符合过滤器规则的报文否则不会产生接收中断
- `FDCANDlcToLen()``FDCANLenToDlc()`是FDCAN特有的数据长度码转换函数用于在数据长度码和实际字节数之间转换。
- `HAL_FDCAN_RxFifo0Callback()``HAL_FDCAN_RxFifo1Callback()`都是对HAL的FDCAN回调函数的重定义原本的callback是`__weak`
修饰的弱定义当发生FIFO0或FIFO1有新消息到达的时候对应的callback会被调用。`FDCANFIFOxCallback()`
随后被前两者调用并根据接收id和硬件中断来源哪一个FDCAN硬件调用对应的instance的回调函数进行协议解析。
- `HAL_FDCAN_ErrorStatusCallback()`处理FDCAN的错误状态包括总线关闭和错误被动状态的恢复。
- 当有一个模块注册了多个FDCAN实例时通过`FDCANInstance.id`,使用强制类型转换将其转换成对应模块的实例指针,就可以对不同的模块实例进行回调处理了。
## 弱定义回调函数
```c
__weak void fdcan1_rx_callback(void);
__weak void fdcan2_rx_callback(void);
__weak void fdcan3_rx_callback(void);
```
这些是弱定义的FDCAN接收回调函数用户可以根据需要重写这些函数来实现特定的功能。
## 注意事项
1. **终端电阻**使用FDCAN设备时务必保证总线只接入了2个终端电阻
2. **FDCAN特性**
- FDCAN支持经典CAN和CAN FD模式
- CAN FD模式下支持最高64字节的数据帧
- 支持更高的通信速率最高5Mbps
3. **发送超时**由于FDCAN总线自带发送检测如果总线上没有挂载目标设备那么发送FIFO会被占满而无法发送。在`FDCANTransmit()`
中会对发送FIFO是否已满进行检查。当超出`timeout`之后函数会返回零,说明发送失败。
4. **任务阻塞**:由于卡在`while(1)`处不断检查FIFO是否空闲调用`FDCANTransmit()`
的任务可能无法按时挂起导致任务定时不精确。建议在没有连接FDCAN进行调试时按需注释掉有关FDCAN发送的代码部分或设定一个较小的
`timeout`值,防止对其他需要精确定时的任务产生影响。
5. **模式选择**:使用`bsp_fdcan_set_baud()`函数可以在经典CAN模式和CAN FD模式之间切换注意不同模式支持的波特率范围不同。
6. **数据长度**FDCAN支持最大64字节的数据帧使用`FDCANSetDLC()`函数设置数据长度时要注意不要超过64字节。

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#include "bsp_flash.h"
#include "main.h"
#include "string.h"
static uint32_t ger_sector(uint32_t address);
/**
* @brief erase flash
* @param[in] address: flash address
* @param[in] len: page num
* @retval none
*/
/**
* @brief 擦除flash
* @param[in] address: flash 地址
* @param[in] len: 页数量
* @retval none
*/
void flash_erase_address(uint32_t address, uint16_t len)
{
FLASH_EraseInitTypeDef flash_erase;
uint32_t error;
flash_erase.Sector = ger_sector(address);
flash_erase.TypeErase = FLASH_TYPEERASE_SECTORS;
flash_erase.VoltageRange = FLASH_VOLTAGE_RANGE_3;
flash_erase.NbSectors = len;
HAL_FLASH_Unlock();
HAL_FLASHEx_Erase(&flash_erase, &error);
HAL_FLASH_Lock();
}
/**
* @brief write data to one page of flash
* @param[in] start_address: flash address
* @param[in] buf: data point
* @param[in] len: data num
* @retval success 0, fail -1
*/
/**
* @brief 往一页flash写数据
* @param[in] start_address: flash 地址
* @param[in] buf: 数据指针
* @param[in] len: 数据长度
* @retval success 0, fail -1
*/
int8_t flash_write_single_address(uint32_t start_address, uint32_t *buf, uint32_t len)
{
static uint32_t uw_address;
static uint32_t end_address;
static uint32_t *data_buf;
static uint32_t data_len;
HAL_FLASH_Unlock();
uw_address = start_address;
end_address = get_next_flash_address(start_address);
data_buf = buf;
data_len = 0;
while (uw_address <= end_address)
{
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, uw_address, *data_buf) == HAL_OK)
{
uw_address += 4;
data_buf++;
data_len++;
if (data_len == len)
{
break;
}
}
else
{
HAL_FLASH_Lock();
return -1;
}
}
HAL_FLASH_Lock();
return 0;
}
/**
* @brief write data to some pages of flash
* @param[in] start_address: flash start address
* @param[in] end_address: flash end address
* @param[in] buf: data point
* @param[in] len: data num
* @retval success 0, fail -1
*/
/**
* @brief 往几页flash写数据
* @param[in] start_address: flash 开始地址
* @param[in] end_address: flash 结束地址
* @param[in] buf: 数据指针
* @param[in] len: 数据长度
* @retval success 0, fail -1
*/
int8_t flash_write_muli_address(uint32_t start_address, uint32_t end_address, uint32_t *buf, uint32_t len)
{
uint32_t uw_address = 0;
uint32_t *data_buf;
uint32_t data_len;
HAL_FLASH_Unlock();
uw_address = start_address;
data_buf = buf;
data_len = 0;
while (uw_address <= end_address)
{
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, uw_address, *data_buf) == HAL_OK)
{
uw_address += 4;
data_buf++;
data_len++;
if (data_len == len)
{
break;
}
}
else
{
HAL_FLASH_Lock();
return -1;
}
}
HAL_FLASH_Lock();
return 0;
}
/**
* @brief read data for flash
* @param[in] address: flash address
* @param[out] buf: data point
* @param[in] len: data num
* @retval none
*/
/**
* @brief 从flash读数据
* @param[in] start_address: flash 地址
* @param[out] buf: 数据指针
* @param[in] len: 数据长度
* @retval none
*/
void flash_read(uint32_t address, uint32_t *buf, uint32_t len)
{
memcpy(buf, (void *) address, len * 4);
}
/**
* @brief get the sector number of flash
* @param[in] address: flash address
* @retval sector number
*/
/**
* @brief 获取flash的sector号
* @param[in] address: flash 地址
* @retval sector号
*/
static uint32_t ger_sector(uint32_t address)
{
uint32_t sector = 0;
if ((address < ADDR_FLASH_SECTOR_1) && (address >= ADDR_FLASH_SECTOR_0))
{
sector = FLASH_SECTOR_0;
}
else if ((address < ADDR_FLASH_SECTOR_2) && (address >= ADDR_FLASH_SECTOR_1))
{
sector = FLASH_SECTOR_1;
}
else if ((address < ADDR_FLASH_SECTOR_3) && (address >= ADDR_FLASH_SECTOR_2))
{
sector = FLASH_SECTOR_2;
}
else if ((address < ADDR_FLASH_SECTOR_4) && (address >= ADDR_FLASH_SECTOR_3))
{
sector = FLASH_SECTOR_3;
}
else if ((address < ADDR_FLASH_SECTOR_5) && (address >= ADDR_FLASH_SECTOR_4))
{
sector = FLASH_SECTOR_4;
}
else if ((address < ADDR_FLASH_SECTOR_6) && (address >= ADDR_FLASH_SECTOR_5))
{
sector = FLASH_SECTOR_5;
}
else if ((address < ADDR_FLASH_SECTOR_7) && (address >= ADDR_FLASH_SECTOR_6))
{
sector = FLASH_SECTOR_6;
}
else if ((address < ADDR_FLASH_SECTOR_8) && (address >= ADDR_FLASH_SECTOR_7))
{
sector = FLASH_SECTOR_7;
}
return sector;
}
/**
* @brief get the next page flash address
* @param[in] address: flash address
* @retval next page flash address
*/
/**
* @brief 获取下一页flash地址
* @param[in] address: flash 地址
* @retval 下一页flash地址
*/
uint32_t get_next_flash_address(uint32_t address)
{
uint32_t sector = 0;
if ((address < ADDR_FLASH_SECTOR_1) && (address >= ADDR_FLASH_SECTOR_0))
{
sector = ADDR_FLASH_SECTOR_1;
}
else if ((address < ADDR_FLASH_SECTOR_2) && (address >= ADDR_FLASH_SECTOR_1))
{
sector = ADDR_FLASH_SECTOR_2;
}
else if ((address < ADDR_FLASH_SECTOR_3) && (address >= ADDR_FLASH_SECTOR_2))
{
sector = ADDR_FLASH_SECTOR_3;
}
else if ((address < ADDR_FLASH_SECTOR_4) && (address >= ADDR_FLASH_SECTOR_3))
{
sector = ADDR_FLASH_SECTOR_4;
}
else if ((address < ADDR_FLASH_SECTOR_5) && (address >= ADDR_FLASH_SECTOR_4))
{
sector = ADDR_FLASH_SECTOR_5;
}
else if ((address < ADDR_FLASH_SECTOR_6) && (address >= ADDR_FLASH_SECTOR_5))
{
sector = ADDR_FLASH_SECTOR_6;
}
else if ((address < ADDR_FLASH_SECTOR_7) && (address >= ADDR_FLASH_SECTOR_6))
{
sector = ADDR_FLASH_SECTOR_7;
}
else if ((address < ADDR_FLASH_SECTOR_8) && (address >= ADDR_FLASH_SECTOR_7))
{
sector = ADDR_FLASH_SECTOR_8;
}
else if ((address < ADDR_FLASH_SECTOR_9) && (address >= ADDR_FLASH_SECTOR_8))
{
sector = ADDR_FLASH_SECTOR_9;
}
else if ((address < ADDR_FLASH_SECTOR_10) && (address >= ADDR_FLASH_SECTOR_9))
{
sector = ADDR_FLASH_SECTOR_10;
}
else if ((address < ADDR_FLASH_SECTOR_11) && (address >= ADDR_FLASH_SECTOR_10))
{
sector = ADDR_FLASH_SECTOR_11;
}
else /*(address < FLASH_END_ADDR) && (address >= ADDR_FLASH_SECTOR_23))*/
{
sector = FLASH_END_ADDR;
}
return sector;
}

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@@ -0,0 +1,79 @@
#ifndef _BSP_FLASH_H
#define _BSP_FLASH_H
#include "main.h"
/* Base address of the Flash sectors */
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base address of Sector 0, 16 Kbytes */
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base address of Sector 1, 16 Kbytes */
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base address of Sector 2, 16 Kbytes */
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base address of Sector 3, 16 Kbytes */
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base address of Sector 4, 64 Kbytes */
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base address of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base address of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base address of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base address of Sector 8, 128 Kbytes */
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base address of Sector 9, 128 Kbytes */
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base address of Sector 10, 128 Kbytes */
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base address of Sector 11, 128 Kbytes */
#define FLASH_END_ADDR ((uint32_t)0x08100000) /* Base address of Sector 23, 128 Kbytes */
#define ADDR_FLASH_SECTOR_12 ((uint32_t)0x08100000) /* Base address of Sector 12, 16 Kbytes */
#define ADDR_FLASH_SECTOR_13 ((uint32_t)0x08104000) /* Base address of Sector 13, 16 Kbytes */
#define ADDR_FLASH_SECTOR_14 ((uint32_t)0x08108000) /* Base address of Sector 14, 16 Kbytes */
#define ADDR_FLASH_SECTOR_15 ((uint32_t)0x0810C000) /* Base address of Sector 15, 16 Kbytes */
#define ADDR_FLASH_SECTOR_16 ((uint32_t)0x08110000) /* Base address of Sector 16, 64 Kbytes */
#define ADDR_FLASH_SECTOR_17 ((uint32_t)0x08120000) /* Base address of Sector 17, 128 Kbytes */
#define ADDR_FLASH_SECTOR_18 ((uint32_t)0x08140000) /* Base address of Sector 18, 128 Kbytes */
#define ADDR_FLASH_SECTOR_19 ((uint32_t)0x08160000) /* Base address of Sector 19, 128 Kbytes */
#define ADDR_FLASH_SECTOR_20 ((uint32_t)0x08180000) /* Base address of Sector 20, 128 Kbytes */
#define ADDR_FLASH_SECTOR_21 ((uint32_t)0x081A0000) /* Base address of Sector 21, 128 Kbytes */
#define ADDR_FLASH_SECTOR_22 ((uint32_t)0x081C0000) /* Base address of Sector 22, 128 Kbytes */
#define ADDR_FLASH_SECTOR_23 ((uint32_t)0x081E0000) /* Base address of Sector 23, 128 Kbytes */
/**
* @brief erase flash
* @param[in] address: flash address
* @param[in] len: page num
* @retval none
*/
void flash_erase_address(uint32_t address, uint16_t len);
/**
* @brief write data to one page of flash
* @param[in] start_address: flash address
* @param[in] buf: data point
* @param[in] len: data num
* @retval success 0, fail -1
*/
int8_t flash_write_single_address(uint32_t start_address, uint32_t *buf, uint32_t len);
/**
* @brief write data to some pages of flash
* @param[in] start_address: flash start address
* @param[in] end_address: flash end address
* @param[in] buf: data point
* @param[in] len: data num
* @retval success 0, fail -1
*/
int8_t flash_write_muli_address(uint32_t start_address, uint32_t end_address, uint32_t *buf, uint32_t len);
/**
* @brief read data for flash
* @param[in] address: flash address
* @param[out] buf: data point
* @param[in] len: data num
* @retval none
*/
void flash_read(uint32_t address, uint32_t *buf, uint32_t len);
/**
* @brief get the next page flash address
* @param[in] address: flash address
* @retval next page flash address
*/
uint32_t get_next_flash_address(uint32_t address);
#endif

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#include "bsp_gpio.h"
#include "memory.h"
#include "stdlib.h"
static uint8_t idx;
static GPIOInstance *gpio_instance[GPIO_MX_DEVICE_NUM] = {NULL};
/**
* @brief EXTI中断回调函数,根据GPIO_Pin找到对应的GPIOInstance,并调用模块回调函数(如果有)
* @note 如何判断具体是哪一个GPIO的引脚连接到这个EXTI中断线上?
* 一个EXTI中断线只能连接一个GPIO引脚,因此可以通过GPIO_Pin来判断,PinX对应EXTIX
* 一个Pin号只会对应一个EXTI,详情见gpio.md
* @param GPIO_Pin 发生中断的GPIO_Pin
*/
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
// 如有必要,可以根据pinstate和HAL_GPIO_ReadPin来判断是上升沿还是下降沿/rise&fall等
GPIOInstance *gpio;
for (size_t i = 0; i < idx; i++)
{
gpio = gpio_instance[i];
if (gpio->GPIO_Pin == GPIO_Pin && gpio->gpio_model_callback != NULL)
{
gpio->gpio_model_callback(gpio);
return;
}
}
}
GPIOInstance *GPIORegister(GPIO_Init_Config_s *GPIO_config)
{
auto ins = (GPIOInstance *) malloc(sizeof(GPIOInstance));
memset(ins, 0, sizeof(GPIOInstance));
ins->GPIOx = GPIO_config->GPIOx;
ins->GPIO_Pin = GPIO_config->GPIO_Pin;
ins->pin_state = GPIO_config->pin_state;
ins->exti_mode = GPIO_config->exti_mode;
ins->id = GPIO_config->id;
ins->gpio_model_callback = GPIO_config->gpio_model_callback;
gpio_instance[idx++] = ins;
return ins;
}
// ----------------- GPIO API -----------------
// 都是对HAL的形式上的封装,后续考虑增加GPIO state变量,可以直接读取state
void GPIOToggel(GPIOInstance *_instance)
{
HAL_GPIO_TogglePin(_instance->GPIOx, _instance->GPIO_Pin);
}
void GPIOSet(GPIOInstance *_instance)
{
HAL_GPIO_WritePin(_instance->GPIOx, _instance->GPIO_Pin, GPIO_PIN_SET);
}
void GPIOReset(GPIOInstance *_instance)
{
HAL_GPIO_WritePin(_instance->GPIOx, _instance->GPIO_Pin, GPIO_PIN_RESET);
}
GPIO_PinState GPIORead(GPIOInstance *_instance)
{
return HAL_GPIO_ReadPin(_instance->GPIOx, _instance->GPIO_Pin);
}

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@@ -0,0 +1,87 @@
#include "gpio.h"
#include "stdint.h"
#define GPIO_MX_DEVICE_NUM 10
/**
* @brief 用于判断中断来源,注意和CUBEMX中配置一致
*
*/
typedef enum
{
GPIO_EXTI_MODE_RISING,
GPIO_EXTI_MODE_FALLING,
GPIO_EXTI_MODE_RISING_FALLING,
GPIO_EXTI_MODE_NONE,
} GPIO_EXTI_MODE_e;
/**
* @brief GPIO实例结构体定义
*
*/
typedef struct tmpgpio
{
GPIO_TypeDef *GPIOx; // GPIOA,GPIOB,GPIOC...
GPIO_PinState pin_state; // 引脚状态,Set,Reset;not frequently used
GPIO_EXTI_MODE_e exti_mode; // 外部中断模式 not frequently used
uint16_t GPIO_Pin; // 引脚号,
// 这些引脚是stm32f4xx_hal_gpio.h中定义的宏!!! 一定要注意
// 随便取个名字当临时声明
void (*gpio_model_callback)(struct tmpgpio *); // exti中断回调函数
void *id; // 区分不同的GPIO实例
} GPIOInstance;
/**
* @brief GPIO初始化配置结构体定义
*
*/
typedef struct
{
GPIO_TypeDef *GPIOx; // GPIOA,GPIOB,GPIOC...
GPIO_PinState pin_state; // 引脚状态,Set,Reset not frequently used
GPIO_EXTI_MODE_e exti_mode; // 外部中断模式 not frequently used
uint16_t GPIO_Pin; // 引脚号,@note 这里的引脚号是GPIO_PIN_0,GPIO_PIN_1...
// 这些引脚是stm32f4xx_hal_gpio.h中定义的宏!!! 一定要注意
void (*gpio_model_callback)(GPIOInstance *); // exti中断回调函数
void *id; // 区分不同的GPIO实例
} GPIO_Init_Config_s;
/**
* @brief 注册GPIO实例
*
* @param GPIO_config
* @return GPIOInstance*
*/
GPIOInstance *GPIORegister(GPIO_Init_Config_s *GPIO_config);
/**
* @brief GPIO API,切换GPIO电平
*
* @param _instance
*/
void GPIOToggel(GPIOInstance *_instance);
/**
* @brief 设置GPIO电平
*
* @param _instance
*/
void GPIOSet(GPIOInstance *_instance);
/**
* @brief 复位GPIO电平
*
* @param _instance
*/
void GPIOReset(GPIOInstance *_instance);
/**
* @brief 读取GPIO电平
*
* @param _instance
* @return GPIO_PinState
*/
GPIO_PinState GPIORead(GPIOInstance *_instance);

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@@ -0,0 +1,18 @@
可以作为io接口,也可以处理外部中断.
使用示例
```c
//在app层只需要设置前三个,callback由module自动设置
GPIO_Init_Config_s gpio_init = {
.exti_mode = GPIO_EXTI_MODE_FALLING, // 注意和CUBEMX的配置一致
.GPIO_Pin = GPIO_PIN_6, // GPIO引脚
.GPIOx = GPIOG, // GPIO外设
.gpio_model_callback = NULL, // EXTI回调函数
},
GPIOInstance* test_example = GPIORegister(&gpio_init);
GPIOSet(test_example);
// GPIOxxx(test_exmaple, ...);
```

146
User_Code/bsp/iic/bsp_iic.c Normal file
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// #include "bsp_iic.h"
// #include "memory.h"
// #include "stdlib.h"
//
// static uint8_t idx = 0; // 配合中断以及初始化
// static IICInstance *iic_instance[IIC_DEVICE_CNT] = {NULL};
//
// IICInstance *IICRegister(IIC_Init_Config_s *conf)
// {
// if (idx >= MX_IIC_SLAVE_CNT) // 超过最大实例数
// while (1) // 酌情增加允许的实例上限,也有可能是内存泄漏
// ;
// // 申请到的空间未必是0, 所以需要手动初始化
// IICInstance *instance = (IICInstance *) malloc(sizeof(IICInstance));
// instance = (IICInstance *) malloc(sizeof(IICInstance));
// memset(instance, 0, sizeof(IICInstance));
//
// instance->dev_address = conf->dev_address << 1; // 地址左移一位,最低位为读写位
// instance->callback = conf->callback;
// instance->work_mode = conf->work_mode;
// instance->handle = conf->handle;
// instance->id = conf->id;
//
// iic_instance[idx++] = instance;
// return instance;
// }
//
// void IICSetMode(IICInstance *iic, IIC_Work_Mode_e mode)
// {
// // HAL自带重入保护,不需要手动终止或等待传输完成
// if (iic->work_mode != mode)
// {
// iic->work_mode = mode; // 如果不同才需要修改
// }
// }
//
// void IICTransmit(IICInstance *iic, uint8_t *data, uint16_t size, IIC_Seq_Mode_e seq_mode)
// {
// if (seq_mode != IIC_SEQ_RELEASE && seq_mode != IIC_SEQ_HOLDON)
// while (1); // 未知传输模式, 程序停止
//
// // 根据不同的工作模式进行不同的传输
// switch (iic->work_mode)
// {
// case IIC_BLOCK_MODE:
// if (seq_mode != IIC_SEQ_RELEASE)
// while (1); // 阻塞模式下不支持HOLD ON模式!!!只能传输完成后立刻释放总线
// HAL_I2C_Master_Transmit(iic->handle, iic->dev_address, data, size, 100); // 默认超时时间100ms
// break;
// case IIC_IT_MODE:
// if (seq_mode == IIC_SEQ_RELEASE)
// HAL_I2C_Master_Seq_Transmit_IT(iic->handle, iic->dev_address, data, size, I2C_OTHER_AND_LAST_FRAME);
// else if (seq_mode == IIC_SEQ_HOLDON)
// HAL_I2C_Master_Seq_Transmit_IT(iic->handle, iic->dev_address, data, size, I2C_OTHER_FRAME);
// break;
// case IIC_DMA_MODE:
// if (seq_mode == IIC_SEQ_RELEASE)
// HAL_I2C_Master_Seq_Transmit_DMA(iic->handle, iic->dev_address, data, size, I2C_OTHER_AND_LAST_FRAME);
// else if (seq_mode == IIC_SEQ_HOLDON)
// HAL_I2C_Master_Seq_Transmit_DMA(iic->handle, iic->dev_address, data, size, I2C_OTHER_FRAME);
// break;
// default:
// while (1); // 未知传输模式, 程序停止
// }
// }
//
// void IICReceive(IICInstance *iic, uint8_t *data, uint16_t size, IIC_Seq_Mode_e seq_mode)
// {
// if (seq_mode != IIC_SEQ_RELEASE && seq_mode != IIC_SEQ_HOLDON)
// while (1); // 未知传输模式, 程序停止,请检查指针越界
//
// // 初始化接收缓冲区地址以及接受长度, 用于中断回调函数
// iic->rx_buffer = data;
// iic->rx_len = size;
//
// switch (iic->work_mode)
// {
// case IIC_BLOCK_MODE:
// if (seq_mode != IIC_SEQ_RELEASE)
// while (1); // 阻塞模式下不支持HOLD ON模式!!!
// HAL_I2C_Master_Receive(iic->handle, iic->dev_address, data, size, 100); // 默认超时时间100ms
// break;
// case IIC_IT_MODE:
// if (seq_mode == IIC_SEQ_RELEASE)
// HAL_I2C_Master_Seq_Receive_IT(iic->handle, iic->dev_address, data, size, I2C_OTHER_AND_LAST_FRAME);
// else if (seq_mode == IIC_SEQ_HOLDON)
// HAL_I2C_Master_Seq_Receive_IT(iic->handle, iic->dev_address, data, size, I2C_OTHER_FRAME);
// break;
// case IIC_DMA_MODE:
// if (seq_mode == IIC_SEQ_RELEASE)
// HAL_I2C_Master_Seq_Receive_DMA(iic->handle, iic->dev_address, data, size, I2C_OTHER_AND_LAST_FRAME);
// else if (seq_mode == IIC_SEQ_HOLDON)
// HAL_I2C_Master_Seq_Receive_DMA(iic->handle, iic->dev_address, data, size, I2C_OTHER_FRAME);
// break;
// default:
// while (1); // 未知传输模式, 程序停止
// break;
// }
// }
//
// void IICAccessMem(IICInstance *iic, uint16_t mem_addr, uint8_t *data, uint16_t size, IIC_Mem_Mode_e mem_mode,
// uint8_t mem8bit_flag)
// {
// uint16_t bit_flag = mem8bit_flag ? I2C_MEMADD_SIZE_8BIT : I2C_MEMADD_SIZE_16BIT;
// if (mem_mode == IIC_WRITE_MEM)
// {
// HAL_I2C_Mem_Write(iic->handle, iic->dev_address, mem_addr, bit_flag, data, size, 100);
// }
// else if (mem_mode == IIC_READ_MEM)
// {
// HAL_I2C_Mem_Read(iic->handle, iic->dev_address, mem_addr, bit_flag, data, size, 100);
// }
// else
// {
// while (1); // 未知模式, 程序停止
// }
// }
//
// /**
// * @brief IIC接收完成回调函数
// *
// * @param hi2c handle
// */
// void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
// {
// // 如果是当前i2c硬件发出的complete,且dev_address和之前发起接收的地址相同,同时回到函数不为空, 则调用回调函数
// for (uint8_t i = 0; i < idx; i++)
// {
// if (iic_instance[i]->handle == hi2c && hi2c->Devaddress == iic_instance[i]->dev_address)
// {
// if (iic_instance[i]->callback != NULL) // 回调函数不为空
// iic_instance[i]->callback(iic_instance[i]);
// return;
// }
// }
// }
//
// /**
// * @brief 内存访问回调函数,仅做形式上的封装,仍然使用HAL_I2C_MasterRxCpltCallback
// *
// * @param hi2c handle
// */
// void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
// {
// HAL_I2C_MasterRxCpltCallback(hi2c);
// }

108
User_Code/bsp/iic/bsp_iic.h Normal file
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// #include "i2c.h"
// #include "stdint.h"
//
// #define IIC_DEVICE_CNT 2 // C板引出了I2C2和I2C3
// #define MX_IIC_SLAVE_CNT 8 // 最大从机数目,根据需要修改
//
// /* i2c 工作模式枚举 */
// typedef enum
// {
// // 基本工作模式
// IIC_BLOCK_MODE = 0, // 阻塞模式
// IIC_IT_MODE, // 中断模式
// IIC_DMA_MODE, // DMA模式
//
// } IIC_Work_Mode_e;
//
// /* I2C MEM工作模式枚举,这两种方法都是阻塞 */
// typedef enum
// {
// IIC_READ_MEM = 0, // 读取从机内部的寄存器or内存
// IIC_WRITE_MEM, // 写入从机内部的寄存器or内存
// } IIC_Mem_Mode_e;
//
// /* Seq传输工作模式枚举,注意HOLD_ON要在IT或DMA下使用 */
// // 必须以IIC_RELEASE为最后一次传输,否则会导致总线占有权无法释放
// typedef enum
// {
// IIC_SEQ_RELEASE, // 完成传输后释放总线占有权,这是默认的传输方式
// IIC_SEQ_HOLDON = 0, // 保持总线占有权不释放,只支持IT和DMA模式
// } IIC_Seq_Mode_e;
//
// /* i2c实例 */
// typedef struct iic_temp_s
// {
// I2C_HandleTypeDef *handle; // i2c handle
// uint8_t dev_address; // 暂时只支持7位地址(还有一位是读写位)
//
// IIC_Work_Mode_e work_mode; // 工作模式
// uint8_t *rx_buffer; // 接收缓冲区指针
// uint8_t rx_len; // 接收长度
// void (*callback)(struct iic_temp_s *); // 接收完成后的回调函数
//
// void *id; // 用于标识i2c instance
// } IICInstance;
//
// /* I2C 初始化结构体配置 */
// typedef struct
// {
// I2C_HandleTypeDef *handle; // i2c handle
// uint8_t dev_address; // 暂时只支持7位地址(还有一位是读写位),注意不需要左移
// IIC_Work_Mode_e work_mode; // 工作模式
// void (*callback)(IICInstance *); // 接收完成后的回调函数
// void *id; // 用于标识i2c instance
// } IIC_Init_Config_s;
//
// /**
// * @brief IIC初始化
// *
// * @param conf 初始化配置
// * @return IICInstance*
// */
// IICInstance *IICRegister(IIC_Init_Config_s *conf);
//
// /**
// * @brief IIC设置工作模式
// *
// * @param iic 要设置的iic实例
// * @param mode 工作模式
// */
// void IICSetMode(IICInstance *iic, IIC_Work_Mode_e mode);
//
// /**
// * @brief IIC发送数据
// *
// * @param iic iic实例
// * @param data 待发送的数据首地址指针
// * @param size 发送长度
// * @param mode 序列传输模式
// * @note 注意,如果发送结构体,那么该结构体在声明时务必使用#pragma pack(1)进行对齐,并在声明结束后使用#pragma pack()恢复对齐
// *
// */
// void IICTransmit(IICInstance *iic, uint8_t *data, uint16_t size, IIC_Seq_Mode_e mode);
//
// /**
// * @brief IIC接收数据
// *
// * @param iic iic实例
// * @param data 接收数据的首地址指针
// * @param size 接收长度
// * @param mode 序列传输模式
// * @note 注意,如果直接将接收数据memcpy到目标结构体或通过强制类型转换进行逐字节写入,
// * 那么该结构体在声明时务必使用#pragma pack(1)进行对齐,并在声明结束后使用#pragma pack()恢复对齐
// */
// void IICReceive(IICInstance *iic, uint8_t *data, uint16_t size, IIC_Seq_Mode_e mode);
//
// /**
// * @brief IIC读取从机寄存器(内存),只支持阻塞模式,超时默认为1ms
// *
// * @param iic iic实例
// * @param mem_addr 要读取的从机内存地址,目前只支持8位地址
// * @param data 要读取或写入的数据首地址指针
// * @param size 要读取或写入的数据长度
// * @param mode 写入或读取模式: IIC_READ_MEM or IIC_WRITE_MEM
// * @param mem8bit_flag 从机内存地址是否为8位
// */
// void IICAccessMem(IICInstance *iic, uint16_t mem_addr, uint8_t *data, uint16_t size, IIC_Mem_Mode_e mode,
// uint8_t mem8bit_flag);

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# bsp iic(暂未启用)
> 预计增加模拟iic
## 注意事项
使用时写入地址,不需要左移!!!
cubemx未配置dma时请勿使用dma传输其行为是未定义的。
## 总线机制详解
关于I2C的序列传输,Restart condition和总线仲裁,请看:
https://blog.csdn.net/NeoZng/article/details/128496694
https://blog.csdn.net/NeoZng/article/details/128486366
使用序列通信则在单次通信后不会释放总线,继续占用直到调用传输函数时传入`IIC_RELEASE`参数. 这个功能只在一条总线上挂载多个主机的时候有用.

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/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER RTT * Real Time Transfer for embedded targets *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the RTT protocol and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* RTT version: 7.22b *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT.h
Purpose : Implementation of SEGGER real-time transfer which allows
real-time communication on targets which support debugger
memory accesses while the CPU is running.
Revision: $Rev: 20869 $
----------------------------------------------------------------------
*/
#ifndef SEGGER_RTT_H
#define SEGGER_RTT_H
#include "SEGGER_RTT_Conf.h"
/*********************************************************************
*
* Defines, defaults
*
**********************************************************************
*/
#ifndef RTT_USE_ASM
#if (defined __SES_ARM) // SEGGER Embedded Studio
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif (defined __CROSSWORKS_ARM) // Rowley Crossworks
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif (defined __ARMCC_VERSION) // ARM compiler
#if (__ARMCC_VERSION >= 6000000) // ARM compiler V6.0 and later is clang based
#define _CC_HAS_RTT_ASM_SUPPORT 1
#else
#define _CC_HAS_RTT_ASM_SUPPORT 0
#endif
#elif (defined __GNUC__) // GCC
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif (defined __clang__) // Clang compiler
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif ((defined __IASMARM__) || (defined __ICCARM__)) // IAR assembler/compiler
#define _CC_HAS_RTT_ASM_SUPPORT 1
#else
#define _CC_HAS_RTT_ASM_SUPPORT 0
#endif
#if ((defined __IASMARM__) || (defined __ICCARM__)) // IAR assembler/compiler
//
// IAR assembler / compiler
//
#if (__VER__ < 6300000)
#define VOLATILE
#else
#define VOLATILE volatile
#endif
#if (defined __ARM7M__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM7M__) // Cortex-M3
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#endif
#endif
#if (defined __ARM7EM__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM7EM__) // Cortex-M4/M7
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() asm VOLATILE ("DMB");
#endif
#endif
#if (defined __ARM8M_BASELINE__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM8M_BASELINE__) // Cortex-M23
#define _CORE_HAS_RTT_ASM_SUPPORT 0
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() asm VOLATILE ("DMB");
#endif
#endif
#if (defined __ARM8M_MAINLINE__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM8M_MAINLINE__) // Cortex-M33
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() asm VOLATILE ("DMB");
#endif
#endif
#else
//
// GCC / Clang
//
#if (defined __ARM_ARCH_7M__) // Cortex-M3
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23
#define _CORE_HAS_RTT_ASM_SUPPORT 0
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#else
#define _CORE_HAS_RTT_ASM_SUPPORT 0
#endif
#endif
//
// If IDE and core support the ASM version, enable ASM version by default
//
#ifndef _CORE_HAS_RTT_ASM_SUPPORT
#define _CORE_HAS_RTT_ASM_SUPPORT 0 // Default for unknown cores
#endif
#if (_CC_HAS_RTT_ASM_SUPPORT && _CORE_HAS_RTT_ASM_SUPPORT)
#define RTT_USE_ASM (1)
#else
#define RTT_USE_ASM (0)
#endif
#endif
//
// We need to know if a DMB is needed to make sure that on Cortex-M7 etc.
// the order of accesses to the ring buffers is guaranteed
// Needed for: Cortex-M7, Cortex-M23, Cortex-M33
//
#ifndef _CORE_NEEDS_DMB
#define _CORE_NEEDS_DMB 0
#endif
#ifndef RTT__DMB
#if _CORE_NEEDS_DMB
#error "Don't know how to place inline assembly for DMB"
#else
#define RTT__DMB()
#endif
#endif
#ifndef SEGGER_RTT_CPU_CACHE_LINE_SIZE
#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (0) // On most target systems where RTT is used, we do not have a CPU cache, therefore 0 is a good default here
#endif
#ifndef SEGGER_RTT_UNCACHED_OFF
#if SEGGER_RTT_CPU_CACHE_LINE_SIZE
#error "SEGGER_RTT_UNCACHED_OFF must be defined when setting SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
#else
#define SEGGER_RTT_UNCACHED_OFF (0)
#endif
#endif
#if RTT_USE_ASM
#if SEGGER_RTT_CPU_CACHE_LINE_SIZE
#error "RTT_USE_ASM is not available if SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
#endif
#endif
#ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file
#include <stdlib.h>
#include <stdarg.h>
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
//
// Determine how much we must pad the control block to make it a multiple of a cache line in size
// Assuming: U8 = 1B
// U16 = 2B
// U32 = 4B
// U8/U16/U32* = 4B
//
#if SEGGER_RTT_CPU_CACHE_LINE_SIZE // Avoid division by zero in case we do not have any cache
#define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (((NumBytes + SEGGER_RTT_CPU_CACHE_LINE_SIZE - 1) / SEGGER_RTT_CPU_CACHE_LINE_SIZE) * SEGGER_RTT_CPU_CACHE_LINE_SIZE)
#else
#define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (NumBytes)
#endif
#define SEGGER_RTT__CB_SIZE (16 + 4 + 4 + (SEGGER_RTT_MAX_NUM_UP_BUFFERS * 24) + (SEGGER_RTT_MAX_NUM_DOWN_BUFFERS * 24))
#define SEGGER_RTT__CB_PADDING (SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(SEGGER_RTT__CB_SIZE) - SEGGER_RTT__CB_SIZE)
/*********************************************************************
*
* Types
*
**********************************************************************
*/
//
// Description for a circular buffer (also called "ring buffer")
// which is used as up-buffer (T->H)
//
typedef struct {
const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
char* pBuffer; // Pointer to start of buffer
unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
unsigned WrOff; // Position of next item to be written by either target.
volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host.
unsigned Flags; // Contains configuration flags
} SEGGER_RTT_BUFFER_UP;
//
// Description for a circular buffer (also called "ring buffer")
// which is used as down-buffer (H->T)
//
typedef struct {
const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
char* pBuffer; // Pointer to start of buffer
unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host.
unsigned RdOff; // Position of next item to be read by target (down-buffer).
unsigned Flags; // Contains configuration flags
} SEGGER_RTT_BUFFER_DOWN;
//
// RTT control block which describes the number of buffers available
// as well as the configuration for each buffer
//
//
typedef struct {
char acID[16]; // Initialized to "SEGGER RTT"
int MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2)
int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2)
SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host
SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target
#if SEGGER_RTT__CB_PADDING
unsigned char aDummy[SEGGER_RTT__CB_PADDING];
#endif
} SEGGER_RTT_CB;
/*********************************************************************
*
* Global data
*
**********************************************************************
*/
extern SEGGER_RTT_CB _SEGGER_RTT;
/*********************************************************************
*
* RTT API functions
*
**********************************************************************
*/
#ifdef __cplusplus
extern "C" {
#endif
int SEGGER_RTT_AllocDownBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_AllocUpBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_ConfigUpBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_ConfigDownBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_GetKey (void);
unsigned SEGGER_RTT_HasData (unsigned BufferIndex);
int SEGGER_RTT_HasKey (void);
unsigned SEGGER_RTT_HasDataUp (unsigned BufferIndex);
void SEGGER_RTT_Init (void);
unsigned SEGGER_RTT_Read (unsigned BufferIndex, void* pBuffer, unsigned BufferSize);
unsigned SEGGER_RTT_ReadNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize);
int SEGGER_RTT_SetNameDownBuffer (unsigned BufferIndex, const char* sName);
int SEGGER_RTT_SetNameUpBuffer (unsigned BufferIndex, const char* sName);
int SEGGER_RTT_SetFlagsDownBuffer (unsigned BufferIndex, unsigned Flags);
int SEGGER_RTT_SetFlagsUpBuffer (unsigned BufferIndex, unsigned Flags);
int SEGGER_RTT_WaitKey (void);
unsigned SEGGER_RTT_Write (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_ASM_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteString (unsigned BufferIndex, const char* s);
void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_PutChar (unsigned BufferIndex, char c);
unsigned SEGGER_RTT_PutCharSkip (unsigned BufferIndex, char c);
unsigned SEGGER_RTT_PutCharSkipNoLock (unsigned BufferIndex, char c);
unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex);
unsigned SEGGER_RTT_GetBytesInBuffer (unsigned BufferIndex);
//
// Function macro for performance optimization
//
#define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)
#if RTT_USE_ASM
#define SEGGER_RTT_WriteSkipNoLock SEGGER_RTT_ASM_WriteSkipNoLock
#endif
/*********************************************************************
*
* RTT transfer functions to send RTT data via other channels.
*
**********************************************************************
*/
unsigned SEGGER_RTT_ReadUpBuffer (unsigned BufferIndex, void* pBuffer, unsigned BufferSize);
unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize);
unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
#define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
/*********************************************************************
*
* RTT "Terminal" API functions
*
**********************************************************************
*/
int SEGGER_RTT_SetTerminal (unsigned char TerminalId);
int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s);
/*********************************************************************
*
* RTT printf functions (require SEGGER_RTT_printf.c)
*
**********************************************************************
*/
int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...);
int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
#ifdef __cplusplus
}
#endif
#endif // ifndef(SEGGER_RTT_ASM)
/*********************************************************************
*
* Defines
*
**********************************************************************
*/
//
// Operating modes. Define behavior if buffer is full (not enough space for entire message)
//
#define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0) // Skip. Do not block, output nothing. (Default)
#define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1) // Trim: Do not block, output as much as fits.
#define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2) // Block: Wait until there is space in the buffer.
#define SEGGER_RTT_MODE_MASK (3)
//
// Control sequences, based on ANSI.
// Can be used to control color, and clear the screen
//
#define RTT_CTRL_RESET "\x1B[0m" // Reset to default colors
#define RTT_CTRL_CLEAR "\x1B[2J" // Clear screen, reposition cursor to top left
#define RTT_CTRL_TEXT_BLACK "\x1B[2;30m"
#define RTT_CTRL_TEXT_RED "\x1B[2;31m"
#define RTT_CTRL_TEXT_GREEN "\x1B[2;32m"
#define RTT_CTRL_TEXT_YELLOW "\x1B[2;33m"
#define RTT_CTRL_TEXT_BLUE "\x1B[2;34m"
#define RTT_CTRL_TEXT_MAGENTA "\x1B[2;35m"
#define RTT_CTRL_TEXT_CYAN "\x1B[2;36m"
#define RTT_CTRL_TEXT_WHITE "\x1B[2;37m"
#define RTT_CTRL_TEXT_BRIGHT_BLACK "\x1B[1;30m"
#define RTT_CTRL_TEXT_BRIGHT_RED "\x1B[1;31m"
#define RTT_CTRL_TEXT_BRIGHT_GREEN "\x1B[1;32m"
#define RTT_CTRL_TEXT_BRIGHT_YELLOW "\x1B[1;33m"
#define RTT_CTRL_TEXT_BRIGHT_BLUE "\x1B[1;34m"
#define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\x1B[1;35m"
#define RTT_CTRL_TEXT_BRIGHT_CYAN "\x1B[1;36m"
#define RTT_CTRL_TEXT_BRIGHT_WHITE "\x1B[1;37m"
#define RTT_CTRL_BG_BLACK "\x1B[24;40m"
#define RTT_CTRL_BG_RED "\x1B[24;41m"
#define RTT_CTRL_BG_GREEN "\x1B[24;42m"
#define RTT_CTRL_BG_YELLOW "\x1B[24;43m"
#define RTT_CTRL_BG_BLUE "\x1B[24;44m"
#define RTT_CTRL_BG_MAGENTA "\x1B[24;45m"
#define RTT_CTRL_BG_CYAN "\x1B[24;46m"
#define RTT_CTRL_BG_WHITE "\x1B[24;47m"
#define RTT_CTRL_BG_BRIGHT_BLACK "\x1B[4;40m"
#define RTT_CTRL_BG_BRIGHT_RED "\x1B[4;41m"
#define RTT_CTRL_BG_BRIGHT_GREEN "\x1B[4;42m"
#define RTT_CTRL_BG_BRIGHT_YELLOW "\x1B[4;43m"
#define RTT_CTRL_BG_BRIGHT_BLUE "\x1B[4;44m"
#define RTT_CTRL_BG_BRIGHT_MAGENTA "\x1B[4;45m"
#define RTT_CTRL_BG_BRIGHT_CYAN "\x1B[4;46m"
#define RTT_CTRL_BG_BRIGHT_WHITE "\x1B[4;47m"
#endif
/*************************** End of file ****************************/

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@@ -0,0 +1,242 @@
/*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_RTT_ASM_ARMv7M.S
Purpose : Assembler implementation of RTT functions for ARMv7M
Additional information:
This module is written to be assembler-independent and works with
GCC and clang (Embedded Studio) and IAR.
*/
#define SEGGER_RTT_ASM // Used to control processed input from header file
#include "SEGGER_RTT.h"
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
#define _CCIAR 0
#define _CCCLANG 1
#if (defined __SES_ARM) || (defined __GNUC__) || (defined __clang__)
#define _CC_TYPE _CCCLANG
#define _PUB_SYM .global
#define _EXT_SYM .extern
#define _END .end
#define _WEAK .weak
#define _THUMB_FUNC .thumb_func
#define _THUMB_CODE .code 16
#define _WORD .word
#define _SECTION(Sect, Type, AlignExp) .section Sect ##, "ax"
#define _ALIGN(Exp) .align Exp
#define _PLACE_LITS .ltorg
#define _DATA_SECT_START
#define _C_STARTUP _start
#define _STACK_END __stack_end__
#define _RAMFUNC
//
// .text => Link to flash
// .fast => Link to RAM
// OtherSect => Usually link to RAM
// Alignment is 2^x
//
#elif defined (__IASMARM__)
#define _CC_TYPE _CCIAR
#define _PUB_SYM PUBLIC
#define _EXT_SYM EXTERN
#define _END END
#define _WEAK _WEAK
#define _THUMB_FUNC
#define _THUMB_CODE THUMB
#define _WORD DCD
#define _SECTION(Sect, Type, AlignExp) SECTION Sect ## : ## Type ## :REORDER:NOROOT ## (AlignExp)
#define _ALIGN(Exp) alignrom Exp
#define _PLACE_LITS
#define _DATA_SECT_START DATA
#define _C_STARTUP __iar_program_start
#define _STACK_END sfe(CSTACK)
#define _RAMFUNC SECTION_TYPE SHT_PROGBITS, SHF_WRITE | SHF_EXECINSTR
//
// .text => Link to flash
// .textrw => Link to RAM
// OtherSect => Usually link to RAM
// NOROOT => Allows linker to throw away the function, if not referenced
// Alignment is 2^x
//
#endif
#if (_CC_TYPE == _CCIAR)
NAME SEGGER_RTT_ASM_ARMv7M
#else
.syntax unified
#endif
#if defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
#define SHT_PROGBITS 0x1
/*********************************************************************
*
* Public / external symbols
*
**********************************************************************
*/
_EXT_SYM __aeabi_memcpy
_EXT_SYM __aeabi_memcpy4
_EXT_SYM _SEGGER_RTT
_PUB_SYM SEGGER_RTT_ASM_WriteSkipNoLock
/*********************************************************************
*
* SEGGER_RTT_WriteSkipNoLock
*
* Function description
* Stores a specified number of characters in SEGGER RTT
* control block which is then read by the host.
* SEGGER_RTT_WriteSkipNoLock does not lock the application and
* skips all data, if the data does not fit into the buffer.
*
* Parameters
* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
* MUST be > 0!!!
* This is done for performance reasons, so no initial check has do be done.
*
* Return value
* 1: Data has been copied
* 0: No space, data has not been copied
*
* Notes
* (1) If there is not enough space in the "Up"-buffer, all data is dropped.
* (2) For performance reasons this function does not call Init()
* and may only be called after RTT has been initialized.
* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
*/
_SECTION(.text, CODE, 2)
_ALIGN(2)
_THUMB_FUNC
SEGGER_RTT_ASM_WriteSkipNoLock: // unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pData, unsigned NumBytes) {
//
// Cases:
// 1) RdOff <= WrOff => Space until wrap-around is sufficient
// 2) RdOff <= WrOff => Space after wrap-around needed (copy in 2 chunks)
// 3) RdOff < WrOff => No space in buf
// 4) RdOff > WrOff => Space is sufficient
// 5) RdOff > WrOff => No space in buf
//
// 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough
//
// Register usage:
// R0 Temporary needed as RdOff, <Tmp> register later on
// R1 pData
// R2 <NumBytes>
// R3 <Tmp> register. Hold free for subroutine calls
// R4 <Rem>
// R5 pRing->pBuffer
// R6 pRing (Points to active struct SEGGER_RTT_BUFFER_DOWN)
// R7 WrOff
//
PUSH {R4-R7}
ADD R3,R0,R0, LSL #+1
LDR.W R0,=_SEGGER_RTT // pRing = &_SEGGER_RTT.aUp[BufferIndex];
ADD R0,R0,R3, LSL #+3
ADD R6,R0,#+24
LDR R0,[R6, #+16] // RdOff = pRing->RdOff;
LDR R7,[R6, #+12] // WrOff = pRing->WrOff;
LDR R5,[R6, #+4] // pRing->pBuffer
CMP R7,R0
BCC.N _CheckCase4 // if (RdOff <= WrOff) { => Case 1), 2) or 3)
//
// Handling for case 1, later on identical to case 4
//
LDR R3,[R6, #+8] // Avail = pRing->SizeOfBuffer - WrOff - 1u; => Space until wrap-around (assume 1 byte not usable for case that RdOff == 0)
SUBS R4,R3,R7 // <Rem> (Used in case we jump into case 2 afterwards)
SUBS R3,R4,#+1 // <Avail>
CMP R3,R2
BCC.N _CheckCase2 // if (Avail >= NumBytes) { => Case 1)?
_Case4:
ADDS R5,R7,R5 // pBuffer += WrOff
ADDS R0,R2,R7 // v = WrOff + NumBytes
//
// 2x unrolling for the copy loop that is used most of the time
// This is a special optimization for small SystemView packets and makes them even faster
//
_ALIGN(2)
_LoopCopyStraight: // memcpy(pRing->pBuffer + WrOff, pData, NumBytes);
LDRB R3,[R1], #+1
STRB R3,[R5], #+1 // *pDest++ = *pSrc++
SUBS R2,R2,#+1
BEQ _CSDone
LDRB R3,[R1], #+1
STRB R3,[R5], #+1 // *pDest++ = *pSrc++
SUBS R2,R2,#+1
BNE _LoopCopyStraight
_CSDone:
#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
#endif
STR R0,[R6, #+12] // pRing->WrOff = WrOff + NumBytes;
MOVS R0,#+1
POP {R4-R7}
BX LR // Return 1
_CheckCase2:
ADDS R0,R0,R3 // Avail += RdOff; => Space incl. wrap-around
CMP R0,R2
BCC.N _Case3 // if (Avail >= NumBytes) { => Case 2? => If not, we have case 3) (does not fit)
//
// Handling for case 2
//
ADDS R0,R7,R5 // v = pRing->pBuffer + WrOff => Do not change pRing->pBuffer here because 2nd chunk needs org. value
SUBS R2,R2,R4 // NumBytes -= Rem; (Rem = pRing->SizeOfBuffer - WrOff; => Space until end of buffer)
_LoopCopyBeforeWrapAround: // memcpy(pRing->pBuffer + WrOff, pData, Rem); => Copy 1st chunk
LDRB R3,[R1], #+1
STRB R3,[R0], #+1 // *pDest++ = *pSrc++
SUBS R4,R4,#+1
BNE _LoopCopyBeforeWrapAround
//
// Special case: First check that assumed RdOff == 0 calculated that last element before wrap-around could not be used
// But 2nd check (considering space until wrap-around and until RdOff) revealed that RdOff is not 0, so we can use the last element
// In this case, we may use a copy straight until buffer end anyway without needing to copy 2 chunks
// Therefore, check if 2nd memcpy is necessary at all
//
ADDS R4,R2,#+0 // Save <NumBytes> (needed as counter in loop but must be written to <WrOff> after the loop). Also use this inst to update the flags to skip 2nd loop if possible
BEQ.N _No2ChunkNeeded // if (NumBytes) {
_LoopCopyAfterWrapAround: // memcpy(pRing->pBuffer, pData + Rem, NumBytes);
LDRB R3,[R1], #+1 // pData already points to the next src byte due to copy loop increment before this loop
STRB R3,[R5], #+1 // *pDest++ = *pSrc++
SUBS R2,R2,#+1
BNE _LoopCopyAfterWrapAround
_No2ChunkNeeded:
#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
#endif
STR R4,[R6, #+12] // pRing->WrOff = NumBytes; => Must be written after copying data because J-Link may read control block asynchronously while writing into buffer
MOVS R0,#+1
POP {R4-R7}
BX LR // Return 1
_CheckCase4:
SUBS R0,R0,R7
SUBS R0,R0,#+1 // Avail = RdOff - WrOff - 1u;
CMP R0,R2
BCS.N _Case4 // if (Avail >= NumBytes) { => Case 4) == 1) ? => If not, we have case 5) == 3) (does not fit)
_Case3:
MOVS R0,#+0
POP {R4-R7}
BX LR // Return 0
_PLACE_LITS
#endif // defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
_END
/*************************** End of file ****************************/

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@@ -0,0 +1,429 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER RTT * Real Time Transfer for embedded targets *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the RTT protocol and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* RTT version: 7.22b *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT_Conf.h
Purpose : Implementation of SEGGER real-time transfer (RTT) which
allows real-time communication on targets which support
debugger memory accesses while the CPU is running.
Revision: $Rev: 21386 $
*/
#ifndef SEGGER_RTT_CONF_H
#define SEGGER_RTT_CONF_H
#ifdef __IAR_SYSTEMS_ICC__
#include <intrinsics.h>
#endif
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
//
// Take in and set to correct values for Cortex-A systems with CPU cache
//
//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system
//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached
//
// Most common case:
// Up-channel 0: RTT
// Up-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
#endif
//
// Most common case:
// Down-channel 0: RTT
// Down-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
#endif
#ifndef BUFFER_SIZE_UP
#define BUFFER_SIZE_UP (2048) // Size of the buffer for terminal output of target, up to host (Default: 1k)
#endif
#ifndef BUFFER_SIZE_DOWN
#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
#endif
#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
#endif
#ifndef SEGGER_RTT_MODE_DEFAULT
#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
#endif
/*********************************************************************
*
* RTT memcpy configuration
*
* memcpy() is good for large amounts of data,
* but the overhead is big for small amounts, which are usually stored via RTT.
* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
*
* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
* This is may be required with memory access restrictions,
* such as on Cortex-A devices with MMU.
*/
#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP
#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
#endif
//
// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
//
//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
//#endif
//
// Target is not allowed to perform other RTT operations while string still has not been stored completely.
// Otherwise we would probably end up with a mixed string in the buffer.
// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
//
// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
// (Higher priority = lower priority number)
// Default value for embOS: 128u
// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
// or define SEGGER_RTT_LOCK() to completely disable interrupts.
//
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
#endif
/*********************************************************************
*
* RTT lock configuration for SEGGER Embedded Studio,
* Rowley CrossStudio and GCC
*/
#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32))
#if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs %0, primask \n\t" \
"movs r1, #1 \n\t" \
"msr primask, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: \
); \
}
#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs %0, basepri \n\t" \
"mov r1, %1 \n\t" \
"msr basepri, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: \
); \
}
#elif defined(__ARM_ARCH_7A__)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs r1, CPSR \n\t" \
"mov %0, r1 \n\t" \
"orr r1, r1, #0xC0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
"mrs r1, CPSR \n\t" \
"bic r1, r1, #0xC0 \n\t" \
"and r0, r0, #0xC0 \n\t" \
"orr r1, r1, r0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "r0", "r1", "cc" \
); \
}
#elif defined(__riscv) || defined(__riscv_xlen)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("csrr %0, mstatus \n\t" \
"csrci mstatus, 8 \n\t" \
"andi %0, %0, 8 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \
"or %0, %0, a1 \n\t" \
"csrs mstatus, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "a1" \
); \
}
#else
#define SEGGER_RTT_LOCK()
#define SEGGER_RTT_UNLOCK()
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for IAR EWARM
*/
#ifdef __ICCARM__
#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \
(defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_PRIMASK(); \
__set_PRIMASK(1);
#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
}
#elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \
(defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \
(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \
(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_BASEPRI(); \
__set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
#define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \
}
#elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \
(defined (__ARM7R__) && (__CORE__ == __ARM7R__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs r1, CPSR \n\t" \
"mov %0, r1 \n\t" \
"orr r1, r1, #0xC0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
"mrs r1, CPSR \n\t" \
"bic r1, r1, #0xC0 \n\t" \
"and r0, r0, #0xC0 \n\t" \
"orr r1, r1, r0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "r0", "r1", "cc" \
); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for IAR RX
*/
#ifdef __ICCRX__
#define SEGGER_RTT_LOCK() { \
unsigned long _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_interrupt_state(); \
__disable_interrupt();
#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for IAR RL78
*/
#ifdef __ICCRL78__
#define SEGGER_RTT_LOCK() { \
__istate_t _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_interrupt_state(); \
__disable_interrupt();
#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for KEIL ARM
*/
#ifdef __CC_ARM
#if (defined __TARGET_ARCH_6S_M)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \
_SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \
_SEGGER_RTT__PRIMASK = 1u; \
__schedule_barrier();
#define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \
__schedule_barrier(); \
}
#elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
register unsigned char BASEPRI __asm( "basepri"); \
_SEGGER_RTT__LockState = BASEPRI; \
BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
__schedule_barrier();
#define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \
__schedule_barrier(); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for TI ARM
*/
#ifdef __TI_ARM__
#if defined (__TI_ARM_V6M0__)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_PRIMASK(); \
__set_PRIMASK(1);
#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
}
#elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
#define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for CCRX
*/
#ifdef __RX
#include <machine.h>
#define SEGGER_RTT_LOCK() { \
unsigned long _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = get_psw() & 0x010000; \
clrpsw_i();
#define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for embOS Simulation on Windows
* (Can also be used for generic RTT locking with embOS)
*/
#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS)
void OS_SIM_EnterCriticalSection(void);
void OS_SIM_LeaveCriticalSection(void);
#define SEGGER_RTT_LOCK() { \
OS_SIM_EnterCriticalSection();
#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \
}
#endif
/*********************************************************************
*
* RTT lock configuration fallback
*/
#ifndef SEGGER_RTT_LOCK
#define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
#endif
#ifndef SEGGER_RTT_UNLOCK
#define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
#endif
#endif
/*************************** End of file ****************************/

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@@ -0,0 +1,505 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER RTT * Real Time Transfer for embedded targets *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the RTT protocol and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* RTT version: 7.22b *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT_printf.c
Purpose : Replacement for printf to write formatted data via RTT
Revision: $Rev: 17697 $
----------------------------------------------------------------------
*/
#include "SEGGER_RTT.h"
#include "SEGGER_RTT_Conf.h"
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64)
#endif
#include <stdlib.h>
#include <stdarg.h>
#define FORMAT_FLAG_LEFT_JUSTIFY (1u << 0)
#define FORMAT_FLAG_PAD_ZERO (1u << 1)
#define FORMAT_FLAG_PRINT_SIGN (1u << 2)
#define FORMAT_FLAG_ALTERNATE (1u << 3)
/*********************************************************************
*
* Types
*
**********************************************************************
*/
typedef struct {
char* pBuffer;
unsigned BufferSize;
unsigned Cnt;
int ReturnValue;
unsigned RTTBufferIndex;
} SEGGER_RTT_PRINTF_DESC;
/*********************************************************************
*
* Function prototypes
*
**********************************************************************
*/
/*********************************************************************
*
* Static code
*
**********************************************************************
*/
/*********************************************************************
*
* _StoreChar
*/
static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) {
unsigned Cnt;
Cnt = p->Cnt;
if ((Cnt + 1u) <= p->BufferSize) {
*(p->pBuffer + Cnt) = c;
p->Cnt = Cnt + 1u;
p->ReturnValue++;
}
//
// Write part of string, when the buffer is full
//
if (p->Cnt == p->BufferSize) {
if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) {
p->ReturnValue = -1;
} else {
p->Cnt = 0u;
}
}
}
/*********************************************************************
*
* _PrintUnsigned
*/
static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
unsigned Div;
unsigned Digit;
unsigned Number;
unsigned Width;
char c;
Number = v;
Digit = 1u;
//
// Get actual field width
//
Width = 1u;
while (Number >= Base) {
Number = (Number / Base);
Width++;
}
if (NumDigits > Width) {
Width = NumDigits;
}
//
// Print leading chars if necessary
//
if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) {
if (FieldWidth != 0u) {
if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) {
c = '0';
} else {
c = ' ';
}
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, c);
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
if (pBufferDesc->ReturnValue >= 0) {
//
// Compute Digit.
// Loop until Digit has the value of the highest digit required.
// Example: If the output is 345 (Base 10), loop 2 times until Digit is 100.
//
while (1) {
if (NumDigits > 1u) { // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned)
NumDigits--;
} else {
Div = v / Digit;
if (Div < Base) { // Is our divider big enough to extract the highest digit from value? => Done
break;
}
}
Digit *= Base;
}
//
// Output digits
//
do {
Div = v / Digit;
v -= Div * Digit;
_StoreChar(pBufferDesc, _aV2C[Div]);
if (pBufferDesc->ReturnValue < 0) {
break;
}
Digit /= Base;
} while (Digit);
//
// Print trailing spaces if necessary
//
if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) {
if (FieldWidth != 0u) {
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, ' ');
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
}
}
/*********************************************************************
*
* _PrintInt
*/
static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
unsigned Width;
int Number;
Number = (v < 0) ? -v : v;
//
// Get actual field width
//
Width = 1u;
while (Number >= (int)Base) {
Number = (Number / (int)Base);
Width++;
}
if (NumDigits > Width) {
Width = NumDigits;
}
if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) {
FieldWidth--;
}
//
// Print leading spaces if necessary
//
if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) {
if (FieldWidth != 0u) {
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, ' ');
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
//
// Print sign if necessary
//
if (pBufferDesc->ReturnValue >= 0) {
if (v < 0) {
v = -v;
_StoreChar(pBufferDesc, '-');
} else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) {
_StoreChar(pBufferDesc, '+');
} else {
}
if (pBufferDesc->ReturnValue >= 0) {
//
// Print leading zeros if necessary
//
if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) {
if (FieldWidth != 0u) {
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, '0');
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
if (pBufferDesc->ReturnValue >= 0) {
//
// Print number without sign
//
_PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags);
}
}
}
}
/*********************************************************************
*
* Public code
*
**********************************************************************
*/
/*********************************************************************
*
* SEGGER_RTT_vprintf
*
* Function description
* Stores a formatted string in SEGGER RTT control block.
* This data is read by the host.
*
* Parameters
* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
* sFormat Pointer to format string
* pParamList Pointer to the list of arguments for the format string
*
* Return values
* >= 0: Number of bytes which have been stored in the "Up"-buffer.
* < 0: Error
*/
int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) {
char c;
SEGGER_RTT_PRINTF_DESC BufferDesc;
int v;
unsigned NumDigits;
unsigned FormatFlags;
unsigned FieldWidth;
char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE];
BufferDesc.pBuffer = acBuffer;
BufferDesc.BufferSize = SEGGER_RTT_PRINTF_BUFFER_SIZE;
BufferDesc.Cnt = 0u;
BufferDesc.RTTBufferIndex = BufferIndex;
BufferDesc.ReturnValue = 0;
do {
c = *sFormat;
sFormat++;
if (c == 0u) {
break;
}
if (c == '%') {
//
// Filter out flags
//
FormatFlags = 0u;
v = 1;
do {
c = *sFormat;
switch (c) {
case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break;
case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO; sFormat++; break;
case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN; sFormat++; break;
case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE; sFormat++; break;
default: v = 0; break;
}
} while (v);
//
// filter out field with
//
FieldWidth = 0u;
do {
c = *sFormat;
if ((c < '0') || (c > '9')) {
break;
}
sFormat++;
FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0');
} while (1);
//
// Filter out precision (number of digits to display)
//
NumDigits = 0u;
c = *sFormat;
if (c == '.') {
sFormat++;
do {
c = *sFormat;
if ((c < '0') || (c > '9')) {
break;
}
sFormat++;
NumDigits = NumDigits * 10u + ((unsigned)c - '0');
} while (1);
}
//
// Filter out length modifier
//
c = *sFormat;
do {
if ((c == 'l') || (c == 'h')) {
sFormat++;
c = *sFormat;
} else {
break;
}
} while (1);
//
// Handle specifiers
//
switch (c) {
case 'c': {
char c0;
v = va_arg(*pParamList, int);
c0 = (char)v;
_StoreChar(&BufferDesc, c0);
break;
}
case 'd':
v = va_arg(*pParamList, int);
_PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags);
break;
case 'u':
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags);
break;
case 'x':
case 'X':
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags);
break;
case 's':
{
const char * s = va_arg(*pParamList, const char *);
do {
c = *s;
s++;
if (c == '\0') {
break;
}
_StoreChar(&BufferDesc, c);
} while (BufferDesc.ReturnValue >= 0);
}
break;
case 'p':
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u);
break;
case '%':
_StoreChar(&BufferDesc, '%');
break;
default:
break;
}
sFormat++;
} else {
_StoreChar(&BufferDesc, c);
}
} while (BufferDesc.ReturnValue >= 0);
if (BufferDesc.ReturnValue > 0) {
//
// Write remaining data, if any
//
if (BufferDesc.Cnt != 0u) {
SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt);
}
BufferDesc.ReturnValue += (int)BufferDesc.Cnt;
}
return BufferDesc.ReturnValue;
}
/*********************************************************************
*
* SEGGER_RTT_printf
*
* Function description
* Stores a formatted string in SEGGER RTT control block.
* This data is read by the host.
*
* Parameters
* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
* sFormat Pointer to format string, followed by the arguments for conversion
*
* Return values
* >= 0: Number of bytes which have been stored in the "Up"-buffer.
* < 0: Error
*
* Notes
* (1) Conversion specifications have following syntax:
* %[flags][FieldWidth][.Precision]ConversionSpecifier
* (2) Supported flags:
* -: Left justify within the field width
* +: Always print sign extension for signed conversions
* 0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision
* Supported conversion specifiers:
* c: Print the argument as one char
* d: Print the argument as a signed integer
* u: Print the argument as an unsigned integer
* x: Print the argument as an hexadecimal integer
* s: Print the string pointed to by the argument
* p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.)
*/
int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) {
int r;
va_list ParamList;
va_start(ParamList, sFormat);
r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList);
va_end(ParamList);
return r;
}
/*************************** End of file ****************************/

View File

@@ -0,0 +1,113 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
----------------------------------------------------------------------
File : Global.h
Purpose : Global types
In case your application already has a Global.h, you should
merge the files. In order to use Segger code, the types
U8, U16, U32, I8, I16, I32 need to be defined in Global.h;
additional definitions do not hurt.
Revision: $Rev: 12501 $
---------------------------END-OF-HEADER------------------------------
*/
#ifndef GLOBAL_H // Guard against multiple inclusion
#define GLOBAL_H
#define U8 unsigned char
#define I8 signed char
#define U16 unsigned short
#define I16 signed short
#ifdef __x86_64__
#define U32 unsigned
#define I32 int
#else
#define U32 unsigned long
#define I32 signed long
#endif
//
// CC_NO_LONG_SUPPORT can be defined to compile test
// without long support for compilers that do not
// support C99 and its long type.
//
#ifdef CC_NO_LONG_SUPPORT
#define PTR_ADDR U32
#else // Supports long type.
#if defined(_WIN32) && !defined(__clang__) && !defined(__MINGW32__)
//
// Microsoft VC6 compiler related
//
#define U64 unsigned __int64
#define U128 unsigned __int128
#define I64 __int64
#define I128 __int128
#if _MSC_VER <= 1200
#define U64_C(x) x##UI64
#else
#define U64_C(x) x##ULL
#endif
#else
//
// C99 compliant compiler
//
#define U64 unsigned long long
#define I64 signed long long
#define U64_C(x) x##ULL
#endif
#if (defined(_WIN64) || defined(__LP64__)) // 64-bit symbols used by Visual Studio and GCC, maybe others as well.
#define PTR_ADDR U64
#else
#define PTR_ADDR U32
#endif
#endif // Supports long type.
#endif // Avoid multiple inclusion
/*************************** End of file ****************************/

View File

@@ -0,0 +1,428 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT_Conf.h
Purpose : Implementation of SEGGER real-time transfer (RTT) which
allows real-time communication on targets which support
debugger memory accesses while the CPU is running.
Revision: $Rev: 24316 $
*/
#ifndef SEGGER_RTT_CONF_H
#define SEGGER_RTT_CONF_H
#ifdef __IAR_SYSTEMS_ICC__
#include <intrinsics.h>
#endif
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
//
// Take in and set to correct values for Cortex-A systems with CPU cache
//
//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system
//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached
//
// Most common case:
// Up-channel 0: RTT
// Up-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
#endif
//
// Most common case:
// Down-channel 0: RTT
// Down-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
#endif
#ifndef BUFFER_SIZE_UP
#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
#endif
#ifndef BUFFER_SIZE_DOWN
#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
#endif
#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
#endif
#ifndef SEGGER_RTT_MODE_DEFAULT
#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
#endif
/*********************************************************************
*
* RTT memcpy configuration
*
* memcpy() is good for large amounts of data,
* but the overhead is big for small amounts, which are usually stored via RTT.
* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
*
* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
* This is may be required with memory access restrictions,
* such as on Cortex-A devices with MMU.
*/
#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP
#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
#endif
//
// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
//
//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
//#endif
//
// Target is not allowed to perform other RTT operations while string still has not been stored completely.
// Otherwise we would probably end up with a mixed string in the buffer.
// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
//
// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
// (Higher priority = lower priority number)
// Default value for embOS: 128u
// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
// or define SEGGER_RTT_LOCK() to completely disable interrupts.
//
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
#endif
/*********************************************************************
*
* RTT lock configuration for SEGGER Embedded Studio,
* Rowley CrossStudio and GCC
*/
#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32))
#if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs %0, primask \n\t" \
"movs r1, #1 \n\t" \
"msr primask, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: \
); \
}
#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs %0, basepri \n\t" \
"mov r1, %1 \n\t" \
"msr basepri, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: \
); \
}
#elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs r1, CPSR \n\t" \
"mov %0, r1 \n\t" \
"orr r1, r1, #0xC0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
"mrs r1, CPSR \n\t" \
"bic r1, r1, #0xC0 \n\t" \
"and r0, r0, #0xC0 \n\t" \
"orr r1, r1, r0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "r0", "r1", "cc" \
); \
}
#elif defined(__riscv) || defined(__riscv_xlen)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("csrr %0, mstatus \n\t" \
"csrci mstatus, 8 \n\t" \
"andi %0, %0, 8 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \
"or %0, %0, a1 \n\t" \
"csrs mstatus, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "a1" \
); \
}
#else
#define SEGGER_RTT_LOCK()
#define SEGGER_RTT_UNLOCK()
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for IAR EWARM
*/
#ifdef __ICCARM__
#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \
(defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_PRIMASK(); \
__set_PRIMASK(1);
#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
}
#elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \
(defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \
(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \
(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_BASEPRI(); \
__set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
#define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \
}
#elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \
(defined (__ARM7R__) && (__CORE__ == __ARM7R__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs r1, CPSR \n\t" \
"mov %0, r1 \n\t" \
"orr r1, r1, #0xC0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
"mrs r1, CPSR \n\t" \
"bic r1, r1, #0xC0 \n\t" \
"and r0, r0, #0xC0 \n\t" \
"orr r1, r1, r0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "r0", "r1", "cc" \
); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for IAR RX
*/
#ifdef __ICCRX__
#define SEGGER_RTT_LOCK() { \
unsigned long _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_interrupt_state(); \
__disable_interrupt();
#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for IAR RL78
*/
#ifdef __ICCRL78__
#define SEGGER_RTT_LOCK() { \
__istate_t _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_interrupt_state(); \
__disable_interrupt();
#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for KEIL ARM
*/
#ifdef __CC_ARM
#if (defined __TARGET_ARCH_6S_M)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \
_SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \
_SEGGER_RTT__PRIMASK = 1u; \
__schedule_barrier();
#define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \
__schedule_barrier(); \
}
#elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
register unsigned char BASEPRI __asm( "basepri"); \
_SEGGER_RTT__LockState = BASEPRI; \
BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
__schedule_barrier();
#define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \
__schedule_barrier(); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for TI ARM
*/
#ifdef __TI_ARM__
#if defined (__TI_ARM_V6M0__)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_PRIMASK(); \
__set_PRIMASK(1);
#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
}
#elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
#define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for CCRX
*/
#ifdef __RX
#include <machine.h>
#define SEGGER_RTT_LOCK() { \
unsigned long _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = get_psw() & 0x010000; \
clrpsw_i();
#define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for embOS Simulation on Windows
* (Can also be used for generic RTT locking with embOS)
*/
#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS)
void OS_SIM_EnterCriticalSection(void);
void OS_SIM_LeaveCriticalSection(void);
#define SEGGER_RTT_LOCK() { \
OS_SIM_EnterCriticalSection();
#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \
}
#endif
/*********************************************************************
*
* RTT lock configuration fallback
*/
#ifndef SEGGER_RTT_LOCK
#define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
#endif
#ifndef SEGGER_RTT_UNLOCK
#define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
#endif
#endif
/*************************** End of file ****************************/

View File

@@ -0,0 +1,85 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW_Conf.h
Purpose : SEGGER SystemView configuration file.
Set defines which deviate from the defaults (see SEGGER_SYSVIEW_ConfDefaults.h) here.
Revision: $Rev: 21292 $
Additional information:
Required defines which must be set are:
SEGGER_SYSVIEW_GET_TIMESTAMP
SEGGER_SYSVIEW_GET_INTERRUPT_ID
For known compilers and cores, these might be set to good defaults
in SEGGER_SYSVIEW_ConfDefaults.h.
SystemView needs a (nestable) locking mechanism.
If not defined, the RTT locking mechanism is used,
which then needs to be properly configured.
*/
#ifndef SEGGER_SYSVIEW_CONF_H
#define SEGGER_SYSVIEW_CONF_H
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
/*********************************************************************
* TODO: Add your defines here. *
**********************************************************************
*/
#endif // SEGGER_SYSVIEW_CONF_H
/*************************** End of file ****************************/

View File

@@ -0,0 +1,308 @@
diff -rupN org/lib/FreeRTOS/portable/GCC/ARM_CM0/port.c new/lib/FreeRTOS/portable/GCC/ARM_CM0/port.c
--- org/lib/FreeRTOS/portable/GCC/ARM_CM0/port.c 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/FreeRTOS/portable/GCC/ARM_CM0/port.c 2017-12-11 01:11:45.061429000 -0800
@@ -333,13 +333,19 @@ void xPortSysTickHandler( void )
uint32_t ulPreviousMask;
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+ traceISR_ENTER();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
{
+ traceISR_EXIT_TO_SCHEDULER();
/* Pend a context switch. */
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
}
+ else
+ {
+ traceISR_EXIT();
+ }
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
}
diff -rupN org/lib/FreeRTOS/portable/GCC/ARM_CM0/portmacro.h new/lib/FreeRTOS/portable/GCC/ARM_CM0/portmacro.h
--- org/lib/FreeRTOS/portable/GCC/ARM_CM0/portmacro.h 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/FreeRTOS/portable/GCC/ARM_CM0/portmacro.h 2017-12-11 01:10:27.732228000 -0800
@@ -82,7 +82,7 @@ extern void vPortYield( void );
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portYIELD() vPortYield()
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+#define portEND_SWITCHING_ISR( xSwitchRequired ) { if( xSwitchRequired ) { traceISR_EXIT_TO_SCHEDULER(); portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } else { traceISR_EXIT(); } }
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
diff -rupN org/lib/FreeRTOS/portable/GCC/ARM_CM3/port.c new/lib/FreeRTOS/portable/GCC/ARM_CM3/port.c
--- org/lib/FreeRTOS/portable/GCC/ARM_CM3/port.c 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/FreeRTOS/portable/GCC/ARM_CM3/port.c 2017-12-11 01:14:50.515630000 -0800
@@ -431,14 +431,20 @@ void xPortSysTickHandler( void )
save and then restore the interrupt mask value as its value is already
known. */
portDISABLE_INTERRUPTS();
+ traceISR_ENTER();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
{
+ traceISR_EXIT_TO_SCHEDULER();
/* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
+ else
+ {
+ traceISR_EXIT();
+ }
}
portENABLE_INTERRUPTS();
}
diff -rupN org/lib/FreeRTOS/portable/GCC/ARM_CM3/portmacro.h new/lib/FreeRTOS/portable/GCC/ARM_CM3/portmacro.h
--- org/lib/FreeRTOS/portable/GCC/ARM_CM3/portmacro.h 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/FreeRTOS/portable/GCC/ARM_CM3/portmacro.h 2017-12-11 01:13:36.868029000 -0800
@@ -90,7 +90,7 @@ typedef unsigned long UBaseType_t;
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
+#define portEND_SWITCHING_ISR( xSwitchRequired ) { if( xSwitchRequired != pdFALSE ) { traceISR_EXIT_TO_SCHEDULER(); portYIELD() } else { traceISR_EXIT(); } }
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
diff -rupN org/lib/FreeRTOS/portable/GCC/ARM_CM4F/port.c new/lib/FreeRTOS/portable/GCC/ARM_CM4F/port.c
--- org/lib/FreeRTOS/portable/GCC/ARM_CM4F/port.c 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/FreeRTOS/portable/GCC/ARM_CM4F/port.c 2017-12-11 01:16:01.771230000 -0800
@@ -493,14 +493,20 @@ void xPortSysTickHandler( void )
save and then restore the interrupt mask value as its value is already
known. */
portDISABLE_INTERRUPTS();
+ traceISR_ENTER();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
{
+ traceISR_EXIT_TO_SCHEDULER();
/* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
+ else
+ {
+ traceISR_EXIT();
+ }
}
portENABLE_INTERRUPTS();
}
diff -rupN org/lib/FreeRTOS/portable/GCC/ARM_CM4F/portmacro.h new/lib/FreeRTOS/portable/GCC/ARM_CM4F/portmacro.h
--- org/lib/FreeRTOS/portable/GCC/ARM_CM4F/portmacro.h 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/FreeRTOS/portable/GCC/ARM_CM4F/portmacro.h 2017-12-11 01:15:16.546830000 -0800
@@ -90,7 +90,7 @@ typedef unsigned long UBaseType_t;
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
+#define portEND_SWITCHING_ISR( xSwitchRequired ) { if( xSwitchRequired != pdFALSE ) { traceISR_EXIT_TO_SCHEDULER(); portYIELD(); } else { traceISR_EXIT(); } }
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
diff -rupN org/lib/FreeRTOS/tasks.c new/lib/FreeRTOS/tasks.c
--- org/lib/FreeRTOS/tasks.c 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/FreeRTOS/tasks.c 2017-12-11 01:08:48.591428000 -0800
@@ -237,6 +237,17 @@ count overflows. */
taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority ); \
vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
+
+/*
+ * Place the task represented by pxTCB which has been in a ready list before
+ * into the appropriate ready list for the task.
+ * It is inserted at the end of the list.
+ */
+#define prvReaddTaskToReadyList( pxTCB ) \
+ traceREADDED_TASK_TO_READY_STATE( pxTCB ); \
+ taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority ); \
+ vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
+ tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
/*-----------------------------------------------------------*/
/*
@@ -1598,7 +1609,7 @@ static void prvAddNewTaskToReadyList( TC
{
mtCOVERAGE_TEST_MARKER();
}
- prvAddTaskToReadyList( pxTCB );
+ prvReaddTaskToReadyList( pxTCB );
}
else
{
@@ -1659,7 +1670,7 @@ static void prvAddNewTaskToReadyList( TC
{
mtCOVERAGE_TEST_MARKER();
}
-
+ traceMOVED_TASK_TO_SUSPENDED_LIST(pxTCB);
vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
#if( configUSE_TASK_NOTIFICATIONS == 1 )
@@ -3671,6 +3682,20 @@ static void prvCheckTasksWaitingTerminat
#endif /* INCLUDE_uxTaskGetStackHighWaterMark */
/*-----------------------------------------------------------*/
+#if (INCLUDE_pxTaskGetStackStart == 1)
+ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask)
+ {
+ TCB_t *pxTCB;
+ UBaseType_t uxReturn;
+ (void)uxReturn;
+
+ pxTCB = prvGetTCBFromHandle( xTask );
+ return ( uint8_t * ) pxTCB->pxStack;
+ }
+
+#endif /* INCLUDE_pxTaskGetStackStart */
+/*-----------------------------------------------------------*/
+
#if ( INCLUDE_vTaskDelete == 1 )
static void prvDeleteTCB( TCB_t *pxTCB )
@@ -3840,7 +3865,7 @@ TCB_t *pxTCB;
/* Inherit the priority before being moved into the new list. */
pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
- prvAddTaskToReadyList( pxMutexHolderTCB );
+ prvReaddTaskToReadyList( pxMutexHolderTCB );
}
else
{
@@ -3930,7 +3955,7 @@ TCB_t *pxTCB;
any other purpose if this task is running, and it must be
running to give back the mutex. */
listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- prvAddTaskToReadyList( pxTCB );
+ prvReaddTaskToReadyList( pxTCB );
/* Return true to indicate that a context switch is required.
This is only actually required in the corner case whereby
@@ -4940,6 +4965,7 @@ const TickType_t xConstTickCount = xTick
/* Add the task to the suspended task list instead of a delayed task
list to ensure it is not woken by a timing event. It will block
indefinitely. */
+ traceMOVED_TASK_TO_SUSPENDED_LIST(pxCurrentTCB);
vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
}
else
@@ -4956,12 +4982,14 @@ const TickType_t xConstTickCount = xTick
{
/* Wake time has overflowed. Place this item in the overflow
list. */
+ traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST();
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
}
else
{
/* The wake time has not overflowed, so the current block list
is used. */
+ traceMOVED_TASK_TO_DELAYED_LIST();
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
/* If the task entering the blocked state was placed at the
@@ -4991,11 +5019,13 @@ const TickType_t xConstTickCount = xTick
if( xTimeToWake < xConstTickCount )
{
/* Wake time has overflowed. Place this item in the overflow list. */
+ traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST();
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
}
else
{
/* The wake time has not overflowed, so the current block list is used. */
+ traceMOVED_TASK_TO_DELAYED_LIST();
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
/* If the task entering the blocked state was placed at the head of the
diff -rupN org/lib/include/FreeRTOS.h new/lib/include/FreeRTOS.h
--- org/lib/include/FreeRTOS.h 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/include/FreeRTOS.h 2017-12-11 00:54:49.522222000 -0800
@@ -157,6 +157,10 @@ extern "C" {
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#endif
+#ifndef INCLUDE_pxTaskGetStackStart
+ #define INCLUDE_pxTaskGetStackStart 0
+#endif
+
#ifndef INCLUDE_eTaskGetState
#define INCLUDE_eTaskGetState 0
#endif
@@ -393,6 +397,23 @@ extern "C" {
#define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
#endif
+#ifndef traceREADDED_TASK_TO_READY_STATE
+ #define traceREADDED_TASK_TO_READY_STATE( pxTCB ) traceMOVED_TASK_TO_READY_STATE( pxTCB )
+#endif
+
+#ifndef traceMOVED_TASK_TO_DELAYED_LIST
+ #define traceMOVED_TASK_TO_DELAYED_LIST()
+#endif
+
+#ifndef traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST
+ #define traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST()
+#endif
+
+#ifndef traceMOVED_TASK_TO_SUSPENDED_LIST
+ #define traceMOVED_TASK_TO_SUSPENDED_LIST( pxTCB )
+#endif
+
+
#ifndef traceQUEUE_CREATE
#define traceQUEUE_CREATE( pxNewQueue )
#endif
@@ -637,6 +658,18 @@ extern "C" {
#define traceTASK_NOTIFY_GIVE_FROM_ISR()
#endif
+#ifndef traceISR_EXIT_TO_SCHEDULER
+ #define traceISR_EXIT_TO_SCHEDULER()
+#endif
+
+#ifndef traceISR_EXIT
+ #define traceISR_EXIT()
+#endif
+
+#ifndef traceISR_ENTER
+ #define traceISR_ENTER()
+#endif
+
#ifndef traceSTREAM_BUFFER_CREATE_FAILED
#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer )
#endif
diff -rupN org/lib/include/task.h new/lib/include/task.h
--- org/lib/include/task.h 2017-11-28 13:48:34.000000000 -0800
+++ new/lib/include/task.h 2017-12-11 00:56:29.783423000 -0800
@@ -1422,6 +1422,25 @@ TaskHandle_t xTaskGetHandle( const char
*/
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+/**
+ * task.h
+ * <PRE>uint8_t* pxTaskGetStackStart( TaskHandle_t xTask);</PRE>
+ *
+ * INCLUDE_pxTaskGetStackStart must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the start of the stack associated with xTask. That is,
+ * the highest stack memory address on architectures where the stack grows down
+ * from high memory, and the lowest memory address on architectures where the
+ * stack grows up from low memory.
+ *
+ * @param xTask Handle of the task associated with the stack returned.
+ * Set xTask to NULL to return the stack of the calling task.
+ *
+ * @return A pointer to the start of the stack.
+ */
+uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
+
/* When using trace macros it is sometimes necessary to include task.h before
FreeRTOS.h. When this is done TaskHookFunction_t will not yet have been defined,
so the following two prototypes will cause a compilation error. This can be

View File

@@ -0,0 +1,308 @@
diff -rupN org/Source/include/FreeRTOS.h new/Source/include/FreeRTOS.h
--- org/Source/include/FreeRTOS.h 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/include/FreeRTOS.h 2017-12-11 00:54:49.522222000 -0800
@@ -157,6 +157,10 @@ extern "C" {
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#endif
+#ifndef INCLUDE_pxTaskGetStackStart
+ #define INCLUDE_pxTaskGetStackStart 0
+#endif
+
#ifndef INCLUDE_eTaskGetState
#define INCLUDE_eTaskGetState 0
#endif
@@ -393,6 +397,23 @@ extern "C" {
#define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
#endif
+#ifndef traceREADDED_TASK_TO_READY_STATE
+ #define traceREADDED_TASK_TO_READY_STATE( pxTCB ) traceMOVED_TASK_TO_READY_STATE( pxTCB )
+#endif
+
+#ifndef traceMOVED_TASK_TO_DELAYED_LIST
+ #define traceMOVED_TASK_TO_DELAYED_LIST()
+#endif
+
+#ifndef traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST
+ #define traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST()
+#endif
+
+#ifndef traceMOVED_TASK_TO_SUSPENDED_LIST
+ #define traceMOVED_TASK_TO_SUSPENDED_LIST( pxTCB )
+#endif
+
+
#ifndef traceQUEUE_CREATE
#define traceQUEUE_CREATE( pxNewQueue )
#endif
@@ -637,6 +658,18 @@ extern "C" {
#define traceTASK_NOTIFY_GIVE_FROM_ISR()
#endif
+#ifndef traceISR_EXIT_TO_SCHEDULER
+ #define traceISR_EXIT_TO_SCHEDULER()
+#endif
+
+#ifndef traceISR_EXIT
+ #define traceISR_EXIT()
+#endif
+
+#ifndef traceISR_ENTER
+ #define traceISR_ENTER()
+#endif
+
#ifndef traceSTREAM_BUFFER_CREATE_FAILED
#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer )
#endif
diff -rupN org/Source/include/task.h new/Source/include/task.h
--- org/Source/include/task.h 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/include/task.h 2017-12-11 00:56:29.783423000 -0800
@@ -1422,6 +1422,25 @@ TaskHandle_t xTaskGetHandle( const char
*/
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+/**
+ * task.h
+ * <PRE>uint8_t* pxTaskGetStackStart( TaskHandle_t xTask);</PRE>
+ *
+ * INCLUDE_pxTaskGetStackStart must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the start of the stack associated with xTask. That is,
+ * the highest stack memory address on architectures where the stack grows down
+ * from high memory, and the lowest memory address on architectures where the
+ * stack grows up from low memory.
+ *
+ * @param xTask Handle of the task associated with the stack returned.
+ * Set xTask to NULL to return the stack of the calling task.
+ *
+ * @return A pointer to the start of the stack.
+ */
+uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
+
/* When using trace macros it is sometimes necessary to include task.h before
FreeRTOS.h. When this is done TaskHookFunction_t will not yet have been defined,
so the following two prototypes will cause a compilation error. This can be
diff -rupN org/Source/portable/GCC/ARM_CM0/port.c new/Source/portable/GCC/ARM_CM0/port.c
--- org/Source/portable/GCC/ARM_CM0/port.c 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/portable/GCC/ARM_CM0/port.c 2017-12-11 01:11:45.061429000 -0800
@@ -333,13 +333,19 @@ void xPortSysTickHandler( void )
uint32_t ulPreviousMask;
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+ traceISR_ENTER();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
{
+ traceISR_EXIT_TO_SCHEDULER();
/* Pend a context switch. */
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
}
+ else
+ {
+ traceISR_EXIT();
+ }
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
}
diff -rupN org/Source/portable/GCC/ARM_CM0/portmacro.h new/Source/portable/GCC/ARM_CM0/portmacro.h
--- org/Source/portable/GCC/ARM_CM0/portmacro.h 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/portable/GCC/ARM_CM0/portmacro.h 2017-12-11 01:10:27.732228000 -0800
@@ -82,7 +82,7 @@ extern void vPortYield( void );
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portYIELD() vPortYield()
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+#define portEND_SWITCHING_ISR( xSwitchRequired ) { if( xSwitchRequired ) { traceISR_EXIT_TO_SCHEDULER(); portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } else { traceISR_EXIT(); } }
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
diff -rupN org/Source/portable/GCC/ARM_CM3/port.c new/Source/portable/GCC/ARM_CM3/port.c
--- org/Source/portable/GCC/ARM_CM3/port.c 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/portable/GCC/ARM_CM3/port.c 2017-12-11 01:14:50.515630000 -0800
@@ -431,14 +431,20 @@ void xPortSysTickHandler( void )
save and then restore the interrupt mask value as its value is already
known. */
portDISABLE_INTERRUPTS();
+ traceISR_ENTER();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
{
+ traceISR_EXIT_TO_SCHEDULER();
/* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
+ else
+ {
+ traceISR_EXIT();
+ }
}
portENABLE_INTERRUPTS();
}
diff -rupN org/Source/portable/GCC/ARM_CM3/portmacro.h new/Source/portable/GCC/ARM_CM3/portmacro.h
--- org/Source/portable/GCC/ARM_CM3/portmacro.h 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/portable/GCC/ARM_CM3/portmacro.h 2017-12-11 01:13:36.868029000 -0800
@@ -90,7 +90,7 @@ typedef unsigned long UBaseType_t;
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
+#define portEND_SWITCHING_ISR( xSwitchRequired ) { if( xSwitchRequired != pdFALSE ) { traceISR_EXIT_TO_SCHEDULER(); portYIELD() } else { traceISR_EXIT(); } }
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
diff -rupN org/Source/portable/GCC/ARM_CM4F/port.c new/Source/portable/GCC/ARM_CM4F/port.c
--- org/Source/portable/GCC/ARM_CM4F/port.c 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/portable/GCC/ARM_CM4F/port.c 2017-12-11 01:16:01.771230000 -0800
@@ -493,14 +493,20 @@ void xPortSysTickHandler( void )
save and then restore the interrupt mask value as its value is already
known. */
portDISABLE_INTERRUPTS();
+ traceISR_ENTER();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
{
+ traceISR_EXIT_TO_SCHEDULER();
/* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
+ else
+ {
+ traceISR_EXIT();
+ }
}
portENABLE_INTERRUPTS();
}
diff -rupN org/Source/portable/GCC/ARM_CM4F/portmacro.h new/Source/portable/GCC/ARM_CM4F/portmacro.h
--- org/Source/portable/GCC/ARM_CM4F/portmacro.h 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/portable/GCC/ARM_CM4F/portmacro.h 2017-12-11 01:15:16.546830000 -0800
@@ -90,7 +90,7 @@ typedef unsigned long UBaseType_t;
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
+#define portEND_SWITCHING_ISR( xSwitchRequired ) { if( xSwitchRequired != pdFALSE ) { traceISR_EXIT_TO_SCHEDULER(); portYIELD(); } else { traceISR_EXIT(); } }
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
diff -rupN org/Source/tasks.c new/Source/tasks.c
--- org/Source/tasks.c 2017-11-28 13:48:34.000000000 -0800
+++ new/Source/tasks.c 2017-12-11 01:08:48.591428000 -0800
@@ -237,6 +237,17 @@ count overflows. */
taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority ); \
vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
+
+/*
+ * Place the task represented by pxTCB which has been in a ready list before
+ * into the appropriate ready list for the task.
+ * It is inserted at the end of the list.
+ */
+#define prvReaddTaskToReadyList( pxTCB ) \
+ traceREADDED_TASK_TO_READY_STATE( pxTCB ); \
+ taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority ); \
+ vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
+ tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
/*-----------------------------------------------------------*/
/*
@@ -1598,7 +1609,7 @@ static void prvAddNewTaskToReadyList( TC
{
mtCOVERAGE_TEST_MARKER();
}
- prvAddTaskToReadyList( pxTCB );
+ prvReaddTaskToReadyList( pxTCB );
}
else
{
@@ -1659,7 +1670,7 @@ static void prvAddNewTaskToReadyList( TC
{
mtCOVERAGE_TEST_MARKER();
}
-
+ traceMOVED_TASK_TO_SUSPENDED_LIST(pxTCB);
vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
#if( configUSE_TASK_NOTIFICATIONS == 1 )
@@ -3671,6 +3682,20 @@ static void prvCheckTasksWaitingTerminat
#endif /* INCLUDE_uxTaskGetStackHighWaterMark */
/*-----------------------------------------------------------*/
+#if (INCLUDE_pxTaskGetStackStart == 1)
+ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask)
+ {
+ TCB_t *pxTCB;
+ UBaseType_t uxReturn;
+ (void)uxReturn;
+
+ pxTCB = prvGetTCBFromHandle( xTask );
+ return ( uint8_t * ) pxTCB->pxStack;
+ }
+
+#endif /* INCLUDE_pxTaskGetStackStart */
+/*-----------------------------------------------------------*/
+
#if ( INCLUDE_vTaskDelete == 1 )
static void prvDeleteTCB( TCB_t *pxTCB )
@@ -3840,7 +3865,7 @@ TCB_t *pxTCB;
/* Inherit the priority before being moved into the new list. */
pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
- prvAddTaskToReadyList( pxMutexHolderTCB );
+ prvReaddTaskToReadyList( pxMutexHolderTCB );
}
else
{
@@ -3930,7 +3955,7 @@ TCB_t *pxTCB;
any other purpose if this task is running, and it must be
running to give back the mutex. */
listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- prvAddTaskToReadyList( pxTCB );
+ prvReaddTaskToReadyList( pxTCB );
/* Return true to indicate that a context switch is required.
This is only actually required in the corner case whereby
@@ -4940,6 +4965,7 @@ const TickType_t xConstTickCount = xTick
/* Add the task to the suspended task list instead of a delayed task
list to ensure it is not woken by a timing event. It will block
indefinitely. */
+ traceMOVED_TASK_TO_SUSPENDED_LIST(pxCurrentTCB);
vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
}
else
@@ -4956,12 +4982,14 @@ const TickType_t xConstTickCount = xTick
{
/* Wake time has overflowed. Place this item in the overflow
list. */
+ traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST();
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
}
else
{
/* The wake time has not overflowed, so the current block list
is used. */
+ traceMOVED_TASK_TO_DELAYED_LIST();
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
/* If the task entering the blocked state was placed at the
@@ -4991,11 +5019,13 @@ const TickType_t xConstTickCount = xTick
if( xTimeToWake < xConstTickCount )
{
/* Wake time has overflowed. Place this item in the overflow list. */
+ traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST();
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
}
else
{
/* The wake time has not overflowed, so the current block list is used. */
+ traceMOVED_TASK_TO_DELAYED_LIST();
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
/* If the task entering the blocked state was placed at the head of the

View File

@@ -0,0 +1,104 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW_Config_FreeRTOS.c
Purpose : Sample setup configuration of SystemView with FreeRTOS.
Revision: $Rev: 7745 $
*/
#include "FreeRTOS.h"
#include "SEGGER_SYSVIEW.h"
extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
// The application name to be displayed in SystemViewer
#define SYSVIEW_APP_NAME "FreeRTOS Demo Application"
// The target device name
#define SYSVIEW_DEVICE_NAME "Cortex-M4"
// Frequency of the timestamp. Must match SEGGER_SYSVIEW_GET_TIMESTAMP in SEGGER_SYSVIEW_Conf.h
#define SYSVIEW_TIMESTAMP_FREQ (configCPU_CLOCK_HZ)
// System Frequency. SystemcoreClock is used in most CMSIS compatible projects.
#define SYSVIEW_CPU_FREQ configCPU_CLOCK_HZ
// The lowest RAM address used for IDs (pointers)
#define SYSVIEW_RAM_BASE (0x10000000)
/*********************************************************************
*
* _cbSendSystemDesc()
*
* Function description
* Sends SystemView description strings.
*/
static void _cbSendSystemDesc(void) {
SEGGER_SYSVIEW_SendSysDesc("N="SYSVIEW_APP_NAME",D="SYSVIEW_DEVICE_NAME",O=FreeRTOS");
//SEGGER_SYSVIEW_SendSysDesc("I#15=SysTick");
}
/*********************************************************************
*
* Global functions
*
**********************************************************************
*/
void SEGGER_SYSVIEW_Conf(void) {
SEGGER_SYSVIEW_Init(SYSVIEW_TIMESTAMP_FREQ, SYSVIEW_CPU_FREQ,
&SYSVIEW_X_OS_TraceAPI, _cbSendSystemDesc);
SEGGER_SYSVIEW_SetRAMBase(SYSVIEW_RAM_BASE);
}
/*************************** End of file ****************************/

View File

@@ -0,0 +1,252 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW_FreeRTOS.c
Purpose : Interface between FreeRTOS and SystemView.
Revision: $Rev: 7947 $
*/
#include "SEGGER_SYSVIEW_FreeRTOS.h"
#include "FreeRTOS.h"
#include "task.h"
#include "SEGGER_SYSVIEW.h"
#include "string.h" // Required for memset
typedef struct SYSVIEW_FREERTOS_TASK_STATUS SYSVIEW_FREERTOS_TASK_STATUS;
struct SYSVIEW_FREERTOS_TASK_STATUS {
U32 xHandle;
const char* pcTaskName;
unsigned uxCurrentPriority;
U32 pxStack;
unsigned uStackHighWaterMark;
};
static SYSVIEW_FREERTOS_TASK_STATUS _aTasks[SYSVIEW_FREERTOS_MAX_NOF_TASKS];
static unsigned _NumTasks;
/*********************************************************************
*
* _cbSendTaskList()
*
* Function description
* This function is part of the link between FreeRTOS and SYSVIEW.
* Called from SystemView when asked by the host, it uses SYSVIEW
* functions to send the entire task list to the host.
*/
static void _cbSendTaskList(void) {
unsigned n;
for (n = 0; n < _NumTasks; n++) {
#if INCLUDE_uxTaskGetStackHighWaterMark // Report Task Stack High Watermark
_aTasks[n].uStackHighWaterMark = uxTaskGetStackHighWaterMark((TaskHandle_t)_aTasks[n].xHandle);
#endif
SYSVIEW_SendTaskInfo((U32)_aTasks[n].xHandle, _aTasks[n].pcTaskName, (unsigned)_aTasks[n].uxCurrentPriority, (U32)_aTasks[n].pxStack, (unsigned)_aTasks[n].uStackHighWaterMark);
}
}
/*********************************************************************
*
* _cbGetTime()
*
* Function description
* This function is part of the link between FreeRTOS and SYSVIEW.
* Called from SystemView when asked by the host, returns the
* current system time in micro seconds.
*/
static U64 _cbGetTime(void) {
U64 Time;
Time = xTaskGetTickCountFromISR();
Time *= portTICK_PERIOD_MS;
Time *= 1000;
return Time;
}
/*********************************************************************
*
* Global functions
*
**********************************************************************
*/
/*********************************************************************
*
* SYSVIEW_AddTask()
*
* Function description
* Add a task to the internal list and record its information.
*/
void SYSVIEW_AddTask(U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32 pxStack, unsigned uStackHighWaterMark) {
if (memcmp(pcTaskName, "IDLE", 5) == 0) {
return;
}
if (_NumTasks >= SYSVIEW_FREERTOS_MAX_NOF_TASKS) {
SEGGER_SYSVIEW_Warn("SYSTEMVIEW: Could not record task information. Maximum number of tasks reached.");
return;
}
_aTasks[_NumTasks].xHandle = xHandle;
_aTasks[_NumTasks].pcTaskName = pcTaskName;
_aTasks[_NumTasks].uxCurrentPriority = uxCurrentPriority;
_aTasks[_NumTasks].pxStack = pxStack;
_aTasks[_NumTasks].uStackHighWaterMark = uStackHighWaterMark;
_NumTasks++;
SYSVIEW_SendTaskInfo(xHandle, pcTaskName,uxCurrentPriority, pxStack, uStackHighWaterMark);
}
/*********************************************************************
*
* SYSVIEW_UpdateTask()
*
* Function description
* Update a task in the internal list and record its information.
*/
void SYSVIEW_UpdateTask(U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32 pxStack, unsigned uStackHighWaterMark) {
unsigned n;
if (memcmp(pcTaskName, "IDLE", 5) == 0) {
return;
}
for (n = 0; n < _NumTasks; n++) {
if (_aTasks[n].xHandle == xHandle) {
break;
}
}
if (n < _NumTasks) {
_aTasks[n].pcTaskName = pcTaskName;
_aTasks[n].uxCurrentPriority = uxCurrentPriority;
_aTasks[n].pxStack = pxStack;
_aTasks[n].uStackHighWaterMark = uStackHighWaterMark;
SYSVIEW_SendTaskInfo(xHandle, pcTaskName, uxCurrentPriority, pxStack, uStackHighWaterMark);
} else {
SYSVIEW_AddTask(xHandle, pcTaskName, uxCurrentPriority, pxStack, uStackHighWaterMark);
}
}
/*********************************************************************
*
* SYSVIEW_DeleteTask()
*
* Function description
* Delete a task from the internal list.
*/
void SYSVIEW_DeleteTask(U32 xHandle) {
unsigned n;
if (_NumTasks == 0) {
return; // Early out
}
for (n = 0; n < _NumTasks; n++) {
if (_aTasks[n].xHandle == xHandle) {
break;
}
}
if (n == (_NumTasks - 1)) {
//
// Task is last item in list.
// Simply zero the item and decrement number of tasks.
//
memset(&_aTasks[n], 0, sizeof(_aTasks[n]));
_NumTasks--;
} else if (n < _NumTasks) {
//
// Task is in the middle of the list.
// Move last item to current position and decrement number of tasks.
// Order of tasks does not really matter, so no need to move all following items.
//
_aTasks[n].xHandle = _aTasks[_NumTasks - 1].xHandle;
_aTasks[n].pcTaskName = _aTasks[_NumTasks - 1].pcTaskName;
_aTasks[n].uxCurrentPriority = _aTasks[_NumTasks - 1].uxCurrentPriority;
_aTasks[n].pxStack = _aTasks[_NumTasks - 1].pxStack;
_aTasks[n].uStackHighWaterMark = _aTasks[_NumTasks - 1].uStackHighWaterMark;
memset(&_aTasks[_NumTasks - 1], 0, sizeof(_aTasks[_NumTasks - 1]));
_NumTasks--;
}
}
/*********************************************************************
*
* SYSVIEW_SendTaskInfo()
*
* Function description
* Record task information.
*/
void SYSVIEW_SendTaskInfo(U32 TaskID, const char* sName, unsigned Prio, U32 StackBase, unsigned StackSize) {
SEGGER_SYSVIEW_TASKINFO TaskInfo;
memset(&TaskInfo, 0, sizeof(TaskInfo)); // Fill all elements with 0 to allow extending the structure in future version without breaking the code
TaskInfo.TaskID = TaskID;
TaskInfo.sName = sName;
TaskInfo.Prio = Prio;
TaskInfo.StackBase = StackBase;
TaskInfo.StackSize = StackSize;
SEGGER_SYSVIEW_SendTaskInfo(&TaskInfo);
}
/*********************************************************************
*
* Public API structures
*
**********************************************************************
*/
// Callbacks provided to SYSTEMVIEW by FreeRTOS
const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI = {
_cbGetTime,
_cbSendTaskList,
};
/*************************** End of file ****************************/

View File

@@ -0,0 +1,331 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW_FreeRTOS.h
Purpose : Interface between FreeRTOS and SystemView.
Tested with FreeRTOS V10.0.0
Revision: $Rev: 7745 $
Notes:
(1) Include this file at the end of FreeRTOSConfig.h
*/
#ifndef SYSVIEW_FREERTOS_H
#define SYSVIEW_FREERTOS_H
#include "SEGGER_SYSVIEW.h"
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
#ifndef portSTACK_GROWTH
#define portSTACK_GROWTH ( -1 )
#endif
#define SYSVIEW_FREERTOS_MAX_NOF_TASKS 8
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
#define apiID_OFFSET (32u)
#define apiID_VTASKALLOCATEMPUREGIONS (1u)
#define apiID_VTASKDELETE (2u)
#define apiID_VTASKDELAY (3u)
#define apiID_VTASKDELAYUNTIL (4u)
#define apiID_UXTASKPRIORITYGET (5u)
#define apiID_UXTASKPRIORITYGETFROMISR (6u)
#define apiID_ETASKGETSTATE (7u)
#define apiID_VTASKPRIORITYSET (8u)
#define apiID_VTASKSUSPEND (9u)
#define apiID_VTASKRESUME (10u)
#define apiID_XTASKRESUMEFROMISR (11u)
#define apiID_VTASKSTARTSCHEDULER (12u)
#define apiID_VTASKENDSCHEDULER (13u)
#define apiID_VTASKSUSPENDALL (14u)
#define apiID_XTASKRESUMEALL (15u)
#define apiID_XTASKGETTICKCOUNT (16u)
#define apiID_XTASKGETTICKCOUNTFROMISR (17u)
#define apiID_UXTASKGETNUMBEROFTASKS (18u)
#define apiID_PCTASKGETTASKNAME (19u)
#define apiID_UXTASKGETSTACKHIGHWATERMARK (20u)
#define apiID_VTASKSETAPPLICATIONTASKTAG (21u)
#define apiID_XTASKGETAPPLICATIONTASKTAG (22u)
#define apiID_VTASKSETTHREADLOCALSTORAGEPOINTER (23u)
#define apiID_PVTASKGETTHREADLOCALSTORAGEPOINTER (24u)
#define apiID_XTASKCALLAPPLICATIONTASKHOOK (25u)
#define apiID_XTASKGETIDLETASKHANDLE (26u)
#define apiID_UXTASKGETSYSTEMSTATE (27u)
#define apiID_VTASKLIST (28u)
#define apiID_VTASKGETRUNTIMESTATS (29u)
#define apiID_XTASKGENERICNOTIFY (30u)
#define apiID_XTASKGENERICNOTIFYFROMISR (31u)
#define apiID_XTASKNOTIFYWAIT (32u)
#define apiID_VTASKNOTIFYGIVEFROMISR (33u)
#define apiID_ULTASKNOTIFYTAKE (34u)
#define apiID_XTASKNOTIFYSTATECLEAR (35u)
#define apiID_XTASKGETCURRENTTASKHANDLE (36u)
#define apiID_VTASKSETTIMEOUTSTATE (37u)
#define apiID_XTASKCHECKFORTIMEOUT (38u)
#define apiID_VTASKMISSEDYIELD (39u)
#define apiID_XTASKGETSCHEDULERSTATE (40u)
#define apiID_VTASKPRIORITYINHERIT (41u)
#define apiID_XTASKPRIORITYDISINHERIT (42u)
#define apiID_XTASKGENERICCREATE (43u)
#define apiID_UXTASKGETTASKNUMBER (44u)
#define apiID_VTASKSETTASKNUMBER (45u)
#define apiID_VTASKSTEPTICK (46u)
#define apiID_ETASKCONFIRMSLEEPMODESTATUS (47u)
#define apiID_XTIMERCREATE (48u)
#define apiID_PVTIMERGETTIMERID (49u)
#define apiID_VTIMERSETTIMERID (50u)
#define apiID_XTIMERISTIMERACTIVE (51u)
#define apiID_XTIMERGETTIMERDAEMONTASKHANDLE (52u)
#define apiID_XTIMERPENDFUNCTIONCALLFROMISR (53u)
#define apiID_XTIMERPENDFUNCTIONCALL (54u)
#define apiID_PCTIMERGETTIMERNAME (55u)
#define apiID_XTIMERCREATETIMERTASK (56u)
#define apiID_XTIMERGENERICCOMMAND (57u)
#define apiID_XQUEUEGENERICSEND (58u)
#define apiID_XQUEUEPEEKFROMISR (59u)
#define apiID_XQUEUEGENERICRECEIVE (60u)
#define apiID_UXQUEUEMESSAGESWAITING (61u)
#define apiID_UXQUEUESPACESAVAILABLE (62u)
#define apiID_VQUEUEDELETE (63u)
#define apiID_XQUEUEGENERICSENDFROMISR (64u)
#define apiID_XQUEUEGIVEFROMISR (65u)
#define apiID_XQUEUERECEIVEFROMISR (66u)
#define apiID_XQUEUEISQUEUEEMPTYFROMISR (67u)
#define apiID_XQUEUEISQUEUEFULLFROMISR (68u)
#define apiID_UXQUEUEMESSAGESWAITINGFROMISR (69u)
#define apiID_XQUEUEALTGENERICSEND (70u)
#define apiID_XQUEUEALTGENERICRECEIVE (71u)
#define apiID_XQUEUECRSENDFROMISR (72u)
#define apiID_XQUEUECRRECEIVEFROMISR (73u)
#define apiID_XQUEUECRSEND (74u)
#define apiID_XQUEUECRRECEIVE (75u)
#define apiID_XQUEUECREATEMUTEX (76u)
#define apiID_XQUEUECREATECOUNTINGSEMAPHORE (77u)
#define apiID_XQUEUEGETMUTEXHOLDER (78u)
#define apiID_XQUEUETAKEMUTEXRECURSIVE (79u)
#define apiID_XQUEUEGIVEMUTEXRECURSIVE (80u)
#define apiID_VQUEUEADDTOREGISTRY (81u)
#define apiID_VQUEUEUNREGISTERQUEUE (82u)
#define apiID_XQUEUEGENERICCREATE (83u)
#define apiID_XQUEUECREATESET (84u)
#define apiID_XQUEUEADDTOSET (85u)
#define apiID_XQUEUEREMOVEFROMSET (86u)
#define apiID_XQUEUESELECTFROMSET (87u)
#define apiID_XQUEUESELECTFROMSETFROMISR (88u)
#define apiID_XQUEUEGENERICRESET (89u)
#define apiID_VLISTINITIALISE (90u)
#define apiID_VLISTINITIALISEITEM (91u)
#define apiID_VLISTINSERT (92u)
#define apiID_VLISTINSERTEND (93u)
#define apiID_UXLISTREMOVE (94u)
#define apiID_XEVENTGROUPCREATE (95u)
#define apiID_XEVENTGROUPWAITBITS (96u)
#define apiID_XEVENTGROUPCLEARBITS (97u)
#define apiID_XEVENTGROUPCLEARBITSFROMISR (98u)
#define apiID_XEVENTGROUPSETBITS (99u)
#define apiID_XEVENTGROUPSETBITSFROMISR (100u)
#define apiID_XEVENTGROUPSYNC (101u)
#define apiID_XEVENTGROUPGETBITSFROMISR (102u)
#define apiID_VEVENTGROUPDELETE (103u)
#define apiID_UXEVENTGROUPGETNUMBER (104u)
#define apiID_XSTREAMBUFFERCREATE (105u)
#define apiID_VSTREAMBUFFERDELETE (106u)
#define apiID_XSTREAMBUFFERRESET (107u)
#define apiID_XSTREAMBUFFERSEND (108u)
#define apiID_XSTREAMBUFFERSENDFROMISR (109u)
#define apiID_XSTREAMBUFFERRECEIVE (110u)
#define apiID_XSTREAMBUFFERRECEIVEFROMISR (111u)
#define traceTASK_NOTIFY_TAKE() SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_ULTASKNOTIFYTAKE, xClearCountOnExit, xTicksToWait)
#define traceTASK_DELAY() SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_VTASKDELAY, xTicksToDelay)
#define traceTASK_DELAY_UNTIL(xTimeToWake) SEGGER_SYSVIEW_RecordVoid (apiID_OFFSET + apiID_VTASKDELAYUNTIL)
#define traceTASK_NOTIFY_GIVE_FROM_ISR() SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_VTASKNOTIFYGIVEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), (U32)pxHigherPriorityTaskWoken)
#define traceTASK_PRIORITY_INHERIT( pxTCB, uxPriority ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_VTASKPRIORITYINHERIT, (U32)pxMutexHolder)
#define traceTASK_RESUME( pxTCB ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_VTASKRESUME, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB))
#define traceINCREASE_TICK_COUNT( xTicksToJump ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_VTASKSTEPTICK, xTicksToJump)
#define traceTASK_SUSPEND( pxTCB ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_VTASKSUSPEND, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB))
#define traceTASK_PRIORITY_DISINHERIT( pxTCB, uxBasePriority ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_XTASKPRIORITYDISINHERIT, (U32)pxMutexHolder)
#define traceTASK_RESUME_FROM_ISR( pxTCB ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_XTASKRESUMEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB))
#define traceTASK_NOTIFY() SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XTASKGENERICNOTIFY, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), ulValue, eAction, (U32)pulPreviousNotificationValue)
#define traceTASK_NOTIFY_FROM_ISR() SEGGER_SYSVIEW_RecordU32x5(apiID_OFFSET + apiID_XTASKGENERICNOTIFYFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), ulValue, eAction, (U32)pulPreviousNotificationValue, (U32)pxHigherPriorityTaskWoken)
#define traceTASK_NOTIFY_WAIT() SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XTASKNOTIFYWAIT, ulBitsToClearOnEntry, ulBitsToClearOnExit, (U32)pulNotificationValue, xTicksToWait)
#define traceQUEUE_CREATE( pxNewQueue ) SEGGER_SYSVIEW_RecordU32x3(apiID_OFFSET + apiID_XQUEUEGENERICCREATE, uxQueueLength, uxItemSize, ucQueueType)
#define traceQUEUE_DELETE( pxQueue ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_VQUEUEDELETE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue))
#define traceQUEUE_PEEK( pxQueue ) SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XQUEUEGENERICRECEIVE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), xTicksToWait, 1)
#define traceQUEUE_PEEK_FROM_ISR( pxQueue ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XQUEUEPEEKFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer))
#define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XQUEUEPEEKFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer))
#define traceQUEUE_RECEIVE( pxQueue ) SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XQUEUEGENERICRECEIVE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)0), xTicksToWait, 1)
#define traceQUEUE_RECEIVE_FAILED( pxQueue ) SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XQUEUEGENERICRECEIVE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)0), xTicksToWait, 1)
#define traceQUEUE_SEMAPHORE_RECEIVE( pxQueue ) SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XQUEUEGENERICRECEIVE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)0), xTicksToWait, 0)
#define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) SEGGER_SYSVIEW_RecordU32x3(apiID_OFFSET + apiID_XQUEUERECEIVEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), (U32)pxHigherPriorityTaskWoken)
#define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) SEGGER_SYSVIEW_RecordU32x3(apiID_OFFSET + apiID_XQUEUERECEIVEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), (U32)pxHigherPriorityTaskWoken)
#define traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_VQUEUEADDTOREGISTRY, SEGGER_SYSVIEW_ShrinkId((U32)xQueue), (U32)pcQueueName)
#if ( configUSE_QUEUE_SETS != 1 )
#define traceQUEUE_SEND( pxQueue ) SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XQUEUEGENERICSEND, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pvItemToQueue, xTicksToWait, xCopyPosition)
#else
#define traceQUEUE_SEND( pxQueue ) SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XQUEUEGENERICSEND, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), 0u, 0u, xCopyPosition)
#endif
#define traceQUEUE_SEND_FAILED( pxQueue ) SEGGER_SYSVIEW_RecordU32x4(apiID_OFFSET + apiID_XQUEUEGENERICSEND, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pvItemToQueue, xTicksToWait, xCopyPosition)
#define traceQUEUE_SEND_FROM_ISR( pxQueue ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XQUEUEGENERICSENDFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pxHigherPriorityTaskWoken)
#define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XQUEUEGENERICSENDFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pxHigherPriorityTaskWoken)
#define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERCREATE, (U32)xIsMessageBuffer, (U32)pxStreamBuffer)
#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERCREATE, (U32)xIsMessageBuffer, 0u)
#define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_VSTREAMBUFFERDELETE, (U32)xStreamBuffer)
#define traceSTREAM_BUFFER_RESET( xStreamBuffer ) SEGGER_SYSVIEW_RecordU32 (apiID_OFFSET + apiID_XSTREAMBUFFERRESET, (U32)xStreamBuffer)
#define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERSEND, (U32)xStreamBuffer, (U32)xBytesSent)
#define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERSEND, (U32)xStreamBuffer, 0u)
#define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERSENDFROMISR, (U32)xStreamBuffer, (U32)xBytesSent)
#define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERRECEIVE, (U32)xStreamBuffer, (U32)xReceivedLength)
#define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERRECEIVE, (U32)xStreamBuffer, 0u)
#define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET + apiID_XSTREAMBUFFERRECEIVEFROMISR, (U32)xStreamBuffer, (U32)xReceivedLength)
#define traceTASK_DELETE( pxTCB ) { \
SEGGER_SYSVIEW_RecordU32(apiID_OFFSET + apiID_VTASKDELETE, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB)); \
SYSVIEW_DeleteTask((U32)pxTCB); \
}
#if( portSTACK_GROWTH < 0 )
#define traceTASK_CREATE(pxNewTCB) if (pxNewTCB != NULL) { \
SEGGER_SYSVIEW_OnTaskCreate((U32)pxNewTCB); \
SYSVIEW_AddTask((U32)pxNewTCB, \
&(pxNewTCB->pcTaskName[0]), \
pxNewTCB->uxPriority, \
(U32)pxNewTCB->pxStack, \
((U32)pxNewTCB->pxTopOfStack - (U32)pxNewTCB->pxStack) \
); \
}
#else
#define traceTASK_CREATE(pxNewTCB) if (pxNewTCB != NULL) { \
SEGGER_SYSVIEW_OnTaskCreate((U32)pxNewTCB); \
SYSVIEW_AddTask((U32)pxNewTCB, \
&(pxNewTCB->pcTaskName[0]), \
pxNewTCB->uxPriority, \
(U32)pxNewTCB->pxStack, \
(U32)(pxNewTCB->pxStack-pxNewTCB->pxTopOfStack) \
); \
}
#endif
#define traceTASK_PRIORITY_SET(pxTask, uxNewPriority) { \
SEGGER_SYSVIEW_RecordU32x2(apiID_OFFSET+apiID_VTASKPRIORITYSET, \
SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), \
uxNewPriority \
); \
SYSVIEW_UpdateTask((U32)pxTask, \
&(pxTask->pcTaskName[0]), \
uxNewPriority, \
(U32)pxTask->pxStack, \
0 \
); \
}
//
// Define INCLUDE_xTaskGetIdleTaskHandle as 1 in FreeRTOSConfig.h to allow identification of Idle state.
//
#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
#define traceTASK_SWITCHED_IN() if(prvGetTCBFromHandle(NULL) == xIdleTaskHandle) { \
SEGGER_SYSVIEW_OnIdle(); \
} else { \
SEGGER_SYSVIEW_OnTaskStartExec((U32)pxCurrentTCB); \
}
#else
#define traceTASK_SWITCHED_IN() { \
if (memcmp(pxCurrentTCB->pcTaskName, "IDLE", 5) != 0) { \
SEGGER_SYSVIEW_OnTaskStartExec((U32)pxCurrentTCB); \
} else { \
SEGGER_SYSVIEW_OnIdle(); \
} \
}
#endif
#define traceMOVED_TASK_TO_READY_STATE(pxTCB) SEGGER_SYSVIEW_OnTaskStartReady((U32)pxTCB)
#define traceREADDED_TASK_TO_READY_STATE(pxTCB)
#define traceMOVED_TASK_TO_DELAYED_LIST() SEGGER_SYSVIEW_OnTaskStopReady((U32)pxCurrentTCB, (1u << 2))
#define traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST() SEGGER_SYSVIEW_OnTaskStopReady((U32)pxCurrentTCB, (1u << 2))
#define traceMOVED_TASK_TO_SUSPENDED_LIST(pxTCB) SEGGER_SYSVIEW_OnTaskStopReady((U32)pxTCB, ((3u << 3) | 3))
#define traceISR_EXIT_TO_SCHEDULER() SEGGER_SYSVIEW_RecordExitISRToScheduler()
#define traceISR_EXIT() SEGGER_SYSVIEW_RecordExitISR()
#define traceISR_ENTER() SEGGER_SYSVIEW_RecordEnterISR()
/*********************************************************************
*
* API functions
*
**********************************************************************
*/
#ifdef __cplusplus
extern "C" {
#endif
void SYSVIEW_AddTask (U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32 pxStack, unsigned uStackHighWaterMark);
void SYSVIEW_UpdateTask (U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32 pxStack, unsigned uStackHighWaterMark);
void SYSVIEW_DeleteTask (U32 xHandle);
void SYSVIEW_SendTaskInfo (U32 TaskID, const char* sName, unsigned Prio, U32 StackBase, unsigned StackSize);
#ifdef __cplusplus
}
#endif
#endif
/*************************** End of file ****************************/

View File

@@ -0,0 +1,248 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
----------------------------------------------------------------------
File : SEGGER.h
Purpose : Global types etc & general purpose utility functions
Revision: $Rev: 18102 $
---------------------------END-OF-HEADER------------------------------
*/
#ifndef SEGGER_H // Guard against multiple inclusion
#define SEGGER_H
#include <stdarg.h> // For va_list.
#include "Global.h" // Type definitions: U8, U16, U32, I8, I16, I32
#if defined(__cplusplus)
extern "C" { /* Make sure we have C-declarations in C++ programs */
#endif
/*********************************************************************
*
* Keywords/specifiers
*
**********************************************************************
*/
#ifndef INLINE
#if (defined(__ICCARM__) || defined(__RX) || defined(__ICCRX__))
//
// Other known compilers.
//
#define INLINE inline
#else
#if (defined(_WIN32) && !defined(__clang__))
//
// Microsoft VC6 and newer.
// Force inlining without cost checking.
//
#define INLINE __forceinline
#elif defined(__GNUC__) || defined(__clang__)
//
// Force inlining with GCC + clang
//
#define INLINE inline __attribute__((always_inline))
#elif (defined(__CC_ARM))
//
// Force inlining with ARMCC (Keil)
//
#define INLINE __inline
#else
//
// Unknown compilers.
//
#define INLINE
#endif
#endif
#endif
/*********************************************************************
*
* Function-like macros
*
**********************************************************************
*/
#define SEGGER_COUNTOF(a) (sizeof((a))/sizeof((a)[0]))
#define SEGGER_MIN(a,b) (((a) < (b)) ? (a) : (b))
#define SEGGER_MAX(a,b) (((a) > (b)) ? (a) : (b))
#ifndef SEGGER_USE_PARA // Some compiler complain about unused parameters.
#define SEGGER_USE_PARA(Para) (void)Para // This works for most compilers.
#endif
#define SEGGER_ADDR2PTR(Type, Addr) (/*lint -e(923) -e(9078)*/((Type*)((PTR_ADDR)(Addr)))) // Allow cast from address to pointer.
#define SEGGER_PTR2ADDR(p) (/*lint -e(923) -e(9078)*/((PTR_ADDR)(p))) // Allow cast from pointer to address.
#define SEGGER_PTR2PTR(Type, p) (/*lint -e(740) -e(826) -e(9079) -e(9087)*/((Type*)(p))) // Allow cast from one pointer type to another (ignore different size).
#define SEGGER_PTR_DISTANCE(p0, p1) (SEGGER_PTR2ADDR(p0) - SEGGER_PTR2ADDR(p1))
/*********************************************************************
*
* Defines
*
**********************************************************************
*/
#define SEGGER_PRINTF_FLAG_ADJLEFT (1 << 0)
#define SEGGER_PRINTF_FLAG_SIGNFORCE (1 << 1)
#define SEGGER_PRINTF_FLAG_SIGNSPACE (1 << 2)
#define SEGGER_PRINTF_FLAG_PRECEED (1 << 3)
#define SEGGER_PRINTF_FLAG_ZEROPAD (1 << 4)
#define SEGGER_PRINTF_FLAG_NEGATIVE (1 << 5)
/*********************************************************************
*
* Types
*
**********************************************************************
*/
typedef struct {
char* pBuffer;
int BufferSize;
int Cnt;
} SEGGER_BUFFER_DESC;
typedef struct {
unsigned int CacheLineSize; // 0: No Cache. Most Systems such as ARM9 use a 32 bytes cache line size.
void (*pfDMB) (void); // Optional DMB function for Data Memory Barrier to make sure all memory operations are completed.
void (*pfClean) (void *p, unsigned long NumBytes); // Optional clean function for cached memory.
void (*pfInvalidate)(void *p, unsigned long NumBytes); // Optional invalidate function for cached memory.
} SEGGER_CACHE_CONFIG;
typedef struct SEGGER_SNPRINTF_CONTEXT_struct SEGGER_SNPRINTF_CONTEXT;
struct SEGGER_SNPRINTF_CONTEXT_struct {
void* pContext; // Application specific context.
SEGGER_BUFFER_DESC* pBufferDesc; // Buffer descriptor to use for output.
void (*pfFlush)(SEGGER_SNPRINTF_CONTEXT* pContext); // Callback executed once the buffer is full. Callback decides if the buffer gets cleared to store more or not.
};
typedef struct {
void (*pfStoreChar) (SEGGER_BUFFER_DESC* pBufferDesc, SEGGER_SNPRINTF_CONTEXT* pContext, char c);
int (*pfPrintUnsigned) (SEGGER_BUFFER_DESC* pBufferDesc, SEGGER_SNPRINTF_CONTEXT* pContext, U32 v, unsigned Base, char Flags, int Width, int Precision);
int (*pfPrintInt) (SEGGER_BUFFER_DESC* pBufferDesc, SEGGER_SNPRINTF_CONTEXT* pContext, I32 v, unsigned Base, char Flags, int Width, int Precision);
} SEGGER_PRINTF_API;
typedef void (*SEGGER_pFormatter)(SEGGER_BUFFER_DESC* pBufferDesc, SEGGER_SNPRINTF_CONTEXT* pContext, const SEGGER_PRINTF_API* pApi, va_list* pParamList, char Lead, int Width, int Precision);
typedef struct SEGGER_PRINTF_FORMATTER {
struct SEGGER_PRINTF_FORMATTER* pNext; // Pointer to next formatter.
SEGGER_pFormatter pfFormatter; // Formatter function.
char Specifier; // Format specifier.
} SEGGER_PRINTF_FORMATTER;
typedef struct {
U32 (*pfGetHPTimestamp)(void); // Mandatory, pfGetHPTimestamp
int (*pfGetUID) (U8 abUID[16]); // Optional, pfGetUID
} SEGGER_BSP_API;
/*********************************************************************
*
* Utility functions
*
**********************************************************************
*/
//
// Memory operations.
//
void SEGGER_ARM_memcpy(void* pDest, const void* pSrc, int NumBytes);
void SEGGER_memcpy (void* pDest, const void* pSrc, unsigned NumBytes);
void SEGGER_memxor (void* pDest, const void* pSrc, unsigned NumBytes);
//
// String functions.
//
int SEGGER_atoi (const char* s);
int SEGGER_isalnum (int c);
int SEGGER_isalpha (int c);
unsigned SEGGER_strlen (const char* s);
int SEGGER_tolower (int c);
int SEGGER_strcasecmp (const char* sText1, const char* sText2);
int SEGGER_strncasecmp(const char *sText1, const char *sText2, unsigned Count);
//
// Buffer/printf related.
//
void SEGGER_StoreChar (SEGGER_BUFFER_DESC* pBufferDesc, char c);
void SEGGER_PrintUnsigned(SEGGER_BUFFER_DESC* pBufferDesc, U32 v, unsigned Base, int Precision);
void SEGGER_PrintInt (SEGGER_BUFFER_DESC* pBufferDesc, I32 v, unsigned Base, int Precision);
int SEGGER_snprintf (char* pBuffer, int BufferSize, const char* sFormat, ...);
int SEGGER_vsnprintf (char* pBuffer, int BufferSize, const char* sFormat, va_list ParamList);
int SEGGER_vsnprintfEx (SEGGER_SNPRINTF_CONTEXT* pContext, const char* sFormat, va_list ParamList);
int SEGGER_PRINTF_AddFormatter (SEGGER_PRINTF_FORMATTER* pFormatter, SEGGER_pFormatter pfFormatter, char c);
void SEGGER_PRINTF_AddDoubleFormatter (void);
void SEGGER_PRINTF_AddIPFormatter (void);
void SEGGER_PRINTF_AddBLUEFormatter (void);
void SEGGER_PRINTF_AddCONNECTFormatter(void);
void SEGGER_PRINTF_AddSSLFormatter (void);
void SEGGER_PRINTF_AddSSHFormatter (void);
void SEGGER_PRINTF_AddHTMLFormatter (void);
//
// BSP abstraction API.
//
int SEGGER_BSP_GetUID (U8 abUID[16]);
int SEGGER_BSP_GetUID32(U32* pUID);
void SEGGER_BSP_SetAPI (const SEGGER_BSP_API* pAPI);
void SEGGER_BSP_SeedUID (void);
//
// Other API.
//
void SEGGER_VERSION_GetString(char acText[8], unsigned Version);
#if defined(__cplusplus)
} /* Make sure we have C-declarations in C++ programs */
#endif
#endif // Avoid multiple inclusion
/*************************** End of file ****************************/

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@@ -0,0 +1,426 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW.h
Purpose : System visualization API.
Revision: $Rev: 28768 $
*/
#ifndef SEGGER_SYSVIEW_H
#define SEGGER_SYSVIEW_H
/*********************************************************************
*
* #include Section
*
**********************************************************************
*/
#include "SEGGER.h"
#include "SEGGER_SYSVIEW_ConfDefaults.h"
#ifdef __cplusplus
extern "C" {
#endif
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
#define SEGGER_SYSVIEW_MAJOR 3
#define SEGGER_SYSVIEW_MINOR 32
#define SEGGER_SYSVIEW_REV 0
#define SEGGER_SYSVIEW_VERSION ((SEGGER_SYSVIEW_MAJOR * 10000) + (SEGGER_SYSVIEW_MINOR * 100) + SEGGER_SYSVIEW_REV)
#define SEGGER_SYSVIEW_INFO_SIZE 9 // Minimum size, which has to be reserved for a packet. 1-2 byte of message type, 0-2 byte of payload length, 1-5 bytes of timestamp.
#define SEGGER_SYSVIEW_QUANTA_U32 5 // Maximum number of bytes to encode a U32, should be reserved for each 32-bit value in a packet.
#define SEGGER_SYSVIEW_LOG (0u)
#define SEGGER_SYSVIEW_WARNING (1u)
#define SEGGER_SYSVIEW_ERROR (2u)
#define SEGGER_SYSVIEW_FLAG_APPEND (1u << 6)
#define SEGGER_SYSVIEW_PREPARE_PACKET(p) (p) + 4
//
// SystemView events. First 32 IDs from 0 .. 31 are reserved for these
//
#define SYSVIEW_EVTID_NOP 0 // Dummy packet.
#define SYSVIEW_EVTID_OVERFLOW 1
#define SYSVIEW_EVTID_ISR_ENTER 2
#define SYSVIEW_EVTID_ISR_EXIT 3
#define SYSVIEW_EVTID_TASK_START_EXEC 4
#define SYSVIEW_EVTID_TASK_STOP_EXEC 5
#define SYSVIEW_EVTID_TASK_START_READY 6
#define SYSVIEW_EVTID_TASK_STOP_READY 7
#define SYSVIEW_EVTID_TASK_CREATE 8
#define SYSVIEW_EVTID_TASK_INFO 9
#define SYSVIEW_EVTID_TRACE_START 10
#define SYSVIEW_EVTID_TRACE_STOP 11
#define SYSVIEW_EVTID_SYSTIME_CYCLES 12
#define SYSVIEW_EVTID_SYSTIME_US 13
#define SYSVIEW_EVTID_SYSDESC 14
#define SYSVIEW_EVTID_MARK_START 15
#define SYSVIEW_EVTID_MARK_STOP 16
#define SYSVIEW_EVTID_IDLE 17
#define SYSVIEW_EVTID_ISR_TO_SCHEDULER 18
#define SYSVIEW_EVTID_TIMER_ENTER 19
#define SYSVIEW_EVTID_TIMER_EXIT 20
#define SYSVIEW_EVTID_STACK_INFO 21
#define SYSVIEW_EVTID_MODULEDESC 22
#define SYSVIEW_EVTID_DATA_SAMPLE 23
#define SYSVIEW_EVTID_INIT 24
#define SYSVIEW_EVTID_NAME_RESOURCE 25
#define SYSVIEW_EVTID_PRINT_FORMATTED 26
#define SYSVIEW_EVTID_NUMMODULES 27
#define SYSVIEW_EVTID_END_CALL 28
#define SYSVIEW_EVTID_TASK_TERMINATE 29
#define SYSVIEW_EVTID_EX 31
//
// SystemView extended events. Sent with ID 31.
//
#define SYSVIEW_EVTID_EX_MARK 0
#define SYSVIEW_EVTID_EX_NAME_MARKER 1
#define SYSVIEW_EVTID_EX_HEAP_DEFINE 2
#define SYSVIEW_EVTID_EX_HEAP_ALLOC 3
#define SYSVIEW_EVTID_EX_HEAP_ALLOC_EX 4
#define SYSVIEW_EVTID_EX_HEAP_FREE 5
#define SYSVIEW_EVTID_EX_REGISTER_DATA 6
//
// Event masks to disable/enable events
//
#define SYSVIEW_EVTMASK_NOP (1 << SYSVIEW_EVTID_NOP)
#define SYSVIEW_EVTMASK_OVERFLOW (1 << SYSVIEW_EVTID_OVERFLOW)
#define SYSVIEW_EVTMASK_ISR_ENTER (1 << SYSVIEW_EVTID_ISR_ENTER)
#define SYSVIEW_EVTMASK_ISR_EXIT (1 << SYSVIEW_EVTID_ISR_EXIT)
#define SYSVIEW_EVTMASK_TASK_START_EXEC (1 << SYSVIEW_EVTID_TASK_START_EXEC)
#define SYSVIEW_EVTMASK_TASK_STOP_EXEC (1 << SYSVIEW_EVTID_TASK_STOP_EXEC)
#define SYSVIEW_EVTMASK_TASK_START_READY (1 << SYSVIEW_EVTID_TASK_START_READY)
#define SYSVIEW_EVTMASK_TASK_STOP_READY (1 << SYSVIEW_EVTID_TASK_STOP_READY)
#define SYSVIEW_EVTMASK_TASK_CREATE (1 << SYSVIEW_EVTID_TASK_CREATE)
#define SYSVIEW_EVTMASK_TASK_INFO (1 << SYSVIEW_EVTID_TASK_INFO)
#define SYSVIEW_EVTMASK_TRACE_START (1 << SYSVIEW_EVTID_TRACE_START)
#define SYSVIEW_EVTMASK_TRACE_STOP (1 << SYSVIEW_EVTID_TRACE_STOP)
#define SYSVIEW_EVTMASK_SYSTIME_CYCLES (1 << SYSVIEW_EVTID_SYSTIME_CYCLES)
#define SYSVIEW_EVTMASK_SYSTIME_US (1 << SYSVIEW_EVTID_SYSTIME_US)
#define SYSVIEW_EVTMASK_SYSDESC (1 << SYSVIEW_EVTID_SYSDESC)
#define SYSVIEW_EVTMASK_USER_START (1 << SYSVIEW_EVTID_USER_START)
#define SYSVIEW_EVTMASK_USER_STOP (1 << SYSVIEW_EVTID_USER_STOP)
#define SYSVIEW_EVTMASK_IDLE (1 << SYSVIEW_EVTID_IDLE)
#define SYSVIEW_EVTMASK_ISR_TO_SCHEDULER (1 << SYSVIEW_EVTID_ISR_TO_SCHEDULER)
#define SYSVIEW_EVTMASK_TIMER_ENTER (1 << SYSVIEW_EVTID_TIMER_ENTER)
#define SYSVIEW_EVTMASK_TIMER_EXIT (1 << SYSVIEW_EVTID_TIMER_EXIT)
#define SYSVIEW_EVTMASK_STACK_INFO (1 << SYSVIEW_EVTID_STACK_INFO)
#define SYSVIEW_EVTMASK_MODULEDESC (1 << SYSVIEW_EVTID_MODULEDESC)
#define SYSVIEW_EVTMASK_DATA_SAMPLE (1 << SYSVIEW_EVTID_DATA_SAMPLE)
#define SYSVIEW_EVTMASK_INIT (1 << SYSVIEW_EVTID_INIT)
#define SYSVIEW_EVTMASK_NAME_RESOURCE (1 << SYSVIEW_EVTID_NAME_RESOURCE)
#define SYSVIEW_EVTMASK_PRINT_FORMATTED (1 << SYSVIEW_EVTID_PRINT_FORMATTED)
#define SYSVIEW_EVTMASK_NUMMODULES (1 << SYSVIEW_EVTID_NUMMODULES)
#define SYSVIEW_EVTMASK_END_CALL (1 << SYSVIEW_EVTID_END_CALL)
#define SYSVIEW_EVTMASK_TASK_TERMINATE (1 << SYSVIEW_EVTID_TASK_TERMINATE)
#define SYSVIEW_EVTMASK_EX (1 << SYSVIEW_EVTID_EX)
#define SYSVIEW_EVTMASK_ALL_INTERRUPTS ( SYSVIEW_EVTMASK_ISR_ENTER \
| SYSVIEW_EVTMASK_ISR_EXIT \
| SYSVIEW_EVTMASK_ISR_TO_SCHEDULER)
#define SYSVIEW_EVTMASK_ALL_TASKS ( SYSVIEW_EVTMASK_TASK_START_EXEC \
| SYSVIEW_EVTMASK_TASK_STOP_EXEC \
| SYSVIEW_EVTMASK_TASK_START_READY \
| SYSVIEW_EVTMASK_TASK_STOP_READY \
| SYSVIEW_EVTMASK_TASK_CREATE \
| SYSVIEW_EVTMASK_TASK_INFO \
| SYSVIEW_EVTMASK_STACK_INFO \
| SYSVIEW_EVTMASK_TASK_TERMINATE)
/*********************************************************************
*
* Structures
*
**********************************************************************
*/
typedef struct {
U32 TaskID;
const char* sName;
U32 Prio;
U32 StackBase;
U32 StackSize;
U32 StackUsage;
} SEGGER_SYSVIEW_TASKINFO;
typedef struct {
U32 TaskID;
U32 StackBase;
U32 StackSize;
U32 StackUsage;
} SEGGER_SYSVIEW_STACKINFO;
typedef struct {
U32 ID;
union {
U32* pU32_Value;
I32* pI32_Value;
float* pFloat_Value;
};
} SEGGER_SYSVIEW_DATA_SAMPLE;
typedef enum {
SEGGER_SYSVIEW_TYPE_U32 = 0,
SEGGER_SYSVIEW_TYPE_I32 = 1,
SEGGER_SYSVIEW_TYPE_FLOAT = 2
} SEGGER_SYSVIEW_DATA_TYPE;
typedef struct {
U32 ID;
SEGGER_SYSVIEW_DATA_TYPE DataType;
I32 Offset;
I32 RangeMin;
I32 RangeMax;
float ScalingFactor;
const char* sName;
const char* sUnit;
} SEGGER_SYSVIEW_DATA_REGISTER;
typedef struct SEGGER_SYSVIEW_MODULE_STRUCT SEGGER_SYSVIEW_MODULE;
struct SEGGER_SYSVIEW_MODULE_STRUCT {
const char* sModule;
U32 NumEvents;
U32 EventOffset;
void (*pfSendModuleDesc)(void);
SEGGER_SYSVIEW_MODULE* pNext;
};
typedef void (SEGGER_SYSVIEW_SEND_SYS_DESC_FUNC)(void);
/*********************************************************************
*
* Global data
*
**********************************************************************
*/
#ifdef EXTERN
#undef EXTERN
#endif
#ifndef SEGGER_SYSVIEW_C // Defined in SEGGER_SYSVIEW.c which includes this header beside other C-files
#define EXTERN extern
#else
#define EXTERN
#endif
EXTERN unsigned int SEGGER_SYSVIEW_TickCnt;
EXTERN unsigned int SEGGER_SYSVIEW_InterruptId;
#undef EXTERN
/*********************************************************************
*
* API functions
*
**********************************************************************
*/
typedef struct {
U64 (*pfGetTime) (void);
void (*pfSendTaskList) (void);
} SEGGER_SYSVIEW_OS_API;
/*********************************************************************
*
* Control and initialization functions
*/
void SEGGER_SYSVIEW_Init (U32 SysFreq, U32 CPUFreq, const SEGGER_SYSVIEW_OS_API *pOSAPI, SEGGER_SYSVIEW_SEND_SYS_DESC_FUNC pfSendSysDesc);
void SEGGER_SYSVIEW_SetRAMBase (U32 RAMBaseAddress);
void SEGGER_SYSVIEW_Start (void);
void SEGGER_SYSVIEW_Stop (void);
void SEGGER_SYSVIEW_GetSysDesc (void);
void SEGGER_SYSVIEW_SendTaskList (void);
void SEGGER_SYSVIEW_SendTaskInfo (const SEGGER_SYSVIEW_TASKINFO* pInfo);
void SEGGER_SYSVIEW_SendStackInfo (const SEGGER_SYSVIEW_STACKINFO* pInfo);
void SEGGER_SYSVIEW_SendSysDesc (const char* sSysDesc);
int SEGGER_SYSVIEW_IsStarted (void);
int SEGGER_SYSVIEW_GetChannelID (void);
void SEGGER_SYSVIEW_SampleData (const SEGGER_SYSVIEW_DATA_SAMPLE *pInfo);
/*********************************************************************
*
* Event recording functions
*/
void SEGGER_SYSVIEW_RecordVoid (unsigned int EventId);
void SEGGER_SYSVIEW_RecordU32 (unsigned int EventId, U32 Para0);
void SEGGER_SYSVIEW_RecordU32x2 (unsigned int EventId, U32 Para0, U32 Para1);
void SEGGER_SYSVIEW_RecordU32x3 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2);
void SEGGER_SYSVIEW_RecordU32x4 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3);
void SEGGER_SYSVIEW_RecordU32x5 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4);
void SEGGER_SYSVIEW_RecordU32x6 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5);
void SEGGER_SYSVIEW_RecordU32x7 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6);
void SEGGER_SYSVIEW_RecordU32x8 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6, U32 Para7);
void SEGGER_SYSVIEW_RecordU32x9 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6, U32 Para7, U32 Para8);
void SEGGER_SYSVIEW_RecordU32x10 (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6, U32 Para7, U32 Para8, U32 Para9);
void SEGGER_SYSVIEW_RecordString (unsigned int EventId, const char* pString);
void SEGGER_SYSVIEW_RecordSystime (void);
void SEGGER_SYSVIEW_RecordEnterISR (void);
void SEGGER_SYSVIEW_RecordExitISR (void);
void SEGGER_SYSVIEW_RecordExitISRToScheduler (void);
void SEGGER_SYSVIEW_RecordEnterTimer (U32 TimerId);
void SEGGER_SYSVIEW_RecordExitTimer (void);
void SEGGER_SYSVIEW_RecordEndCall (unsigned int EventID);
void SEGGER_SYSVIEW_RecordEndCallU32 (unsigned int EventID, U32 Para0);
void SEGGER_SYSVIEW_OnIdle (void);
void SEGGER_SYSVIEW_OnTaskCreate (U32 TaskId);
void SEGGER_SYSVIEW_OnTaskTerminate (U32 TaskId);
void SEGGER_SYSVIEW_OnTaskStartExec (U32 TaskId);
void SEGGER_SYSVIEW_OnTaskStopExec (void);
void SEGGER_SYSVIEW_OnTaskStartReady (U32 TaskId);
void SEGGER_SYSVIEW_OnTaskStopReady (U32 TaskId, unsigned int Cause);
void SEGGER_SYSVIEW_MarkStart (unsigned int MarkerId);
void SEGGER_SYSVIEW_MarkStop (unsigned int MarkerId);
void SEGGER_SYSVIEW_Mark (unsigned int MarkerId);
void SEGGER_SYSVIEW_NameMarker (unsigned int MarkerId, const char* sName);
void SEGGER_SYSVIEW_HeapDefine (void* pHeap, void* pBase, unsigned int HeapSize, unsigned int MetadataSize);
void SEGGER_SYSVIEW_HeapAlloc (void* pHeap, void* pUserData, unsigned int UserDataLen);
void SEGGER_SYSVIEW_HeapAllocEx (void* pHeap, void* pUserData, unsigned int UserDataLen, unsigned int Tag);
void SEGGER_SYSVIEW_HeapFree (void* pHeap, void* pUserData);
void SEGGER_SYSVIEW_NameResource (U32 ResourceId, const char* sName);
void SEGGER_SYSVIEW_RegisterData ( SEGGER_SYSVIEW_DATA_REGISTER* pInfo);
int SEGGER_SYSVIEW_SendPacket (U8* pPacket, U8* pPayloadEnd, unsigned int EventId);
/*********************************************************************
*
* Event parameter encoding functions
*/
U8* SEGGER_SYSVIEW_EncodeU32 (U8* pPayload, U32 Value);
U8* SEGGER_SYSVIEW_EncodeData (U8* pPayload, const char* pSrc, unsigned int Len);
U8* SEGGER_SYSVIEW_EncodeString (U8* pPayload, const char* s, unsigned int MaxLen);
U8* SEGGER_SYSVIEW_EncodeId (U8* pPayload, U32 Id);
U32 SEGGER_SYSVIEW_ShrinkId (U32 Id);
/*********************************************************************
*
* Middleware module registration
*/
void SEGGER_SYSVIEW_RegisterModule (SEGGER_SYSVIEW_MODULE* pModule);
void SEGGER_SYSVIEW_RecordModuleDescription (const SEGGER_SYSVIEW_MODULE* pModule, const char* sDescription);
void SEGGER_SYSVIEW_SendModule (U8 ModuleId);
void SEGGER_SYSVIEW_SendModuleDescription (void);
void SEGGER_SYSVIEW_SendNumModules (void);
/*********************************************************************
*
* printf-Style functions
*/
#ifndef SEGGER_SYSVIEW_EXCLUDE_PRINTF // Define in project to avoid warnings about variable parameter list
void SEGGER_SYSVIEW_PrintfHostEx (const char* s, U32 Options, ...);
void SEGGER_SYSVIEW_VPrintfHostEx (const char* s, U32 Options, va_list* pParamList);
void SEGGER_SYSVIEW_PrintfTargetEx (const char* s, U32 Options, ...);
void SEGGER_SYSVIEW_VPrintfTargetEx (const char* s, U32 Options, va_list* pParamList);
void SEGGER_SYSVIEW_PrintfHost (const char* s, ...);
void SEGGER_SYSVIEW_VPrintfHost (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_PrintfTarget (const char* s, ...);
void SEGGER_SYSVIEW_VPrintfTarget (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_WarnfHost (const char* s, ...);
void SEGGER_SYSVIEW_VWarnfHost (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_WarnfTarget (const char* s, ...);
void SEGGER_SYSVIEW_VWarnfTarget (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_ErrorfHost (const char* s, ...);
void SEGGER_SYSVIEW_VErrorfHost (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_ErrorfTarget (const char* s, ...);
void SEGGER_SYSVIEW_VErrorfTarget (const char* s, va_list* pParamList);
#endif
void SEGGER_SYSVIEW_Print (const char* s);
void SEGGER_SYSVIEW_Warn (const char* s);
void SEGGER_SYSVIEW_Error (const char* s);
/*********************************************************************
*
* Run-time configuration functions
*/
void SEGGER_SYSVIEW_EnableEvents (U32 EnableMask);
void SEGGER_SYSVIEW_DisableEvents (U32 DisableMask);
/*********************************************************************
*
* Application-provided functions
*/
void SEGGER_SYSVIEW_Conf (void);
U32 SEGGER_SYSVIEW_X_GetTimestamp (void);
U32 SEGGER_SYSVIEW_X_GetInterruptId (void);
void SEGGER_SYSVIEW_X_StartComm (void);
void SEGGER_SYSVIEW_X_OnEventRecorded (unsigned NumBytes);
#ifdef __cplusplus
}
#endif
/*********************************************************************
*
* Compatibility API defines
*/
#define SEGGER_SYSVIEW_OnUserStart SEGGER_SYSVIEW_MarkStart
#define SEGGER_SYSVIEW_OnUserStop SEGGER_SYSVIEW_MarkStop
#endif
/*************************** End of file ****************************/

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@@ -0,0 +1,579 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW_ConfDefaults.h
Purpose : Defines defaults for configurable defines used in
SEGGER SystemView.
Revision: $Rev: 26230 $
*/
#ifndef SEGGER_SYSVIEW_CONFDEFAULTS_H
#define SEGGER_SYSVIEW_CONFDEFAULTS_H
/*********************************************************************
*
* #include Section
*
**********************************************************************
*/
#include "SEGGER_SYSVIEW_Conf.h"
#include "SEGGER_RTT_Conf.h"
#ifdef __cplusplus
extern "C" {
#endif
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
//
// Use auto-detection for SEGGER_SYSVIEW_CORE define
// based on compiler-/toolchain-specific defines
// to define SEGGER_SYSVIEW_GET_INTERRUPT_ID and SEGGER_SYSVIEW_GET_TIMESTAMP
//
#define SEGGER_SYSVIEW_CORE_OTHER 0
#define SEGGER_SYSVIEW_CORE_CM0 1 // Cortex-M0/M0+/M1
#define SEGGER_SYSVIEW_CORE_CM3 2 // Cortex-M3/M4/M7
#define SEGGER_SYSVIEW_CORE_RX 3 // Renesas RX
#ifndef SEGGER_SYSVIEW_CORE
#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __SEGGER_CC__) || (defined __GNUC__) || (defined __clang__)
#if (defined __ARM_ARCH_6M__) || (defined __ARM_ARCH_8M_BASE__)
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
#endif
#elif defined(__ICCARM__)
#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) \
|| (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
#elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) \
|| (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) \
|| (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) \
|| (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
#endif
#elif defined(__CC_ARM)
#if (defined(__TARGET_ARCH_6S_M))
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
#elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
#endif
#elif defined(__TI_ARM__)
#ifdef __TI_ARM_V6M0__
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
#elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__))
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
#endif
#elif defined(__ICCRX__)
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
#elif defined(__RX)
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
#endif
#ifndef SEGGER_SYSVIEW_CORE
#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER
#endif
#endif
/*********************************************************************
*
* Defines, defaults
*
**********************************************************************
*/
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_APP_NAME
*
* Description
* The application name to be displayed in SystemView.
* Default
* "SystemView-enabled Application"
* Notes
* Convenience define to be used for SEGGER_SYSVIEW_SendSysDesc().
*/
#ifndef SEGGER_SYSVIEW_APP_NAME
#define SEGGER_SYSVIEW_APP_NAME "SystemView-enabled Application"
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_DEVICE_NAME
*
* Description
* The target device name to be displayed in SystemView.
* Default
* "undefined device"
* Notes
* Convenience define to be used for SEGGER_SYSVIEW_SendSysDesc().
*/
#ifndef SEGGER_SYSVIEW_DEVICE_NAME
#define SEGGER_SYSVIEW_DEVICE_NAME "undefined device"
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_GET_INTERRUPT_ID()
*
* Description
* Function macro to retrieve the Id of the currently active
* interrupt.
* Default
* Call user-supplied function SEGGER_SYSVIEW_X_GetInterruptId().
* Notes
* For some known compilers and cores, a ready-to-use, core-specific
* default is set.
* ARMv7M: Read ICSR[8:0] (active vector)
* ARMv6M: Read ICSR[5:0] (active vector)
*/
#ifndef SEGGER_SYSVIEW_GET_INTERRUPT_ID
#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32*)(0xE000ED04)) & 0x1FF) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector)
#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0
#if defined(__ICCARM__)
#if (__VER__ > 6010000)
#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() (__get_IPSR()) // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead.
#else
#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32*)(0xE000ED04)) & 0x3F) // Older versions of IAR do not include __get_IPSR, but might also not optimize to byte-access.
#endif
#else
#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32*)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector)
#endif
#else
#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function.
#endif
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_GET_TIMESTAMP()
*
* Description
* Function macro to retrieve a system timestamp for SYSVIEW events.
* Default
* Call user-supplied function SEGGER_SYSVIEW_X_GetTimestamp().
* Notes
* For some known compilers and cores, a ready-to-use, core-specific
* default is set.
* ARMv7M: Read Cortex-M Cycle Count register.
*
* The system timestamp clock frequency has to be passed in
* SEGGER_SYSVIEW_Init().
*/
#ifndef SEGGER_SYSVIEW_GET_TIMESTAMP
#if defined (SEGGER_SYSVIEW_CORE) && (SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3)
#define SEGGER_SYSVIEW_GET_TIMESTAMP() (*(U32 *)(0xE0001004)) // Retrieve a system timestamp. Cortex-M cycle counter.
#else
#define SEGGER_SYSVIEW_GET_TIMESTAMP() SEGGER_SYSVIEW_X_GetTimestamp() // Retrieve a system timestamp via user-defined function
#endif
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_TIMESTAMP_BITS
*
* Description
* Number of valid (low-order) bits delivered in system timestamp.
* Default
* 32
* Notes
* Value has to match system timestamp clock source.
*/
// Define number of valid bits low-order delivered by clock source.
#ifndef SEGGER_SYSVIEW_TIMESTAMP_BITS
#define SEGGER_SYSVIEW_TIMESTAMP_BITS 32
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_RTT_CHANNEL
*
* Description
* The RTT channel that SystemView will use.
* Default
* 0: Auto selection.
* Notes
* Value has to be lower than SEGGER_RTT_MAX_NUM_UP_BUFFERS.
*/
#ifndef SEGGER_SYSVIEW_RTT_CHANNEL
#define SEGGER_SYSVIEW_RTT_CHANNEL 0
#endif
// Sanity check of RTT channel
#if (SEGGER_SYSVIEW_RTT_CHANNEL == 0) && (SEGGER_RTT_MAX_NUM_UP_BUFFERS < 2)
#error "SEGGER_RTT_MAX_NUM_UP_BUFFERS in SEGGER_RTT_Conf.h has to be > 1!"
#elif (SEGGER_SYSVIEW_RTT_CHANNEL >= SEGGER_RTT_MAX_NUM_UP_BUFFERS)
#error "SEGGER_RTT_MAX_NUM_UP_BUFFERS in SEGGER_RTT_Conf.h has to be > SEGGER_SYSVIEW_RTT_CHANNEL!"
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_RTT_BUFFER_SIZE
*
* Description
* Number of bytes that SystemView uses for the RTT buffer.
* Default
* 1024
*/
#ifndef SEGGER_SYSVIEW_RTT_BUFFER_SIZE
#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE 1024
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_SECTION
*
* Description
* Section to place the SystemView RTT Buffer into.
* Default
* undefined: Do not place into a specific section.
* Notes
* If SEGGER_RTT_SECTION is defined, the default changes to use
* this section for the SystemView RTT Buffer, too.
*/
#if !(defined SEGGER_SYSVIEW_SECTION) && (defined SEGGER_RTT_SECTION)
#define SEGGER_SYSVIEW_SECTION SEGGER_RTT_SECTION
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_CPU_CACHE_LINE_SIZE
*
* Description
* Largest cache line size (in bytes) in the target system.
* Default
* 0
* Notes
* Required in systems with caches to make sure that the SystemView
* RTT buffer can be aligned accordingly.
*/
#ifndef SEGGER_SYSVIEW_CPU_CACHE_LINE_SIZE
#define SEGGER_SYSVIEW_CPU_CACHE_LINE_SIZE 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_ID_BASE
*
* Description
* Lowest Id reported by the application.
* Default
* 0
* Notes
* Value is usually subtracted from mailboxes, semaphores, tasks,
* .... addresses, to compress event parameters.
* Should be the lowest RAM address of the system.
*/
#ifndef SEGGER_SYSVIEW_ID_BASE
#define SEGGER_SYSVIEW_ID_BASE 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_ID_SHIFT
*
* Description
* Number of bits to shift Ids.
* Default
* 0
* Notes
* Ids are shifted to compress event parameters.
* Should match the alignment of Ids (addresses),
* e.g. 2 when Ids are 4 byte aligned.
*/
#ifndef SEGGER_SYSVIEW_ID_SHIFT
#define SEGGER_SYSVIEW_ID_SHIFT 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_MAX_ARGUMENTS
*
* Description
* Maximum number of arguments which are handled with SystemView
* print routines or may be encoded in one recording function.
* routines.
* Default
* 16
*/
#ifndef SEGGER_SYSVIEW_MAX_ARGUMENTS
#define SEGGER_SYSVIEW_MAX_ARGUMENTS 16
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_MAX_STRING_LEN
*
* Description
* Maximum string length which can be used in SystemView print and
* system description routines.
* Default
* 128
*/
#ifndef SEGGER_SYSVIEW_MAX_STRING_LEN
#define SEGGER_SYSVIEW_MAX_STRING_LEN 128
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_SUPPORT_LONG_ID
*
* Description
* It set, support enconding Evend Ids longer than 14 bit.
* Default
* 1
*/
#ifndef SEGGER_SYSVIEW_SUPPORT_LONG_ID
#define SEGGER_SYSVIEW_SUPPORT_LONG_ID 1
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_SUPPORT_LONG_DATA
*
* Description
* It set, support enconding event data longer than 14 bit.
* Default
* 0
*/
#ifndef SEGGER_SYSVIEW_SUPPORT_LONG_DATA
#define SEGGER_SYSVIEW_SUPPORT_LONG_DATA 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
*
* Description
* If enabled, on SEGGER_SYSVIEW_PrintHost, check the format string
* and if it includes unsupported formatters, use formatting on the
* target instead.
* Default
* 0: Disabled.
*/
#ifndef SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
#define SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_USE_INTERNAL_RECORDER
*
* Description
* If set, an internal recorder, such as UART or IP is used.
* Default
* 0: Disabled.
* Notes
* Convenience define to be used by SEGGER_SYSVIEW_Conf(),
* such as in embOS configuration to enable Cortex-M cycle counter.
*/
#ifndef SEGGER_SYSVIEW_USE_INTERNAL_RECORDER
#define SEGGER_SYSVIEW_USE_INTERNAL_RECORDER 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_CAN_RESTART
*
* Description
* If enabled, send the SystemView start sequence on every start
* command, not just on the first one.
* Enables restart when SystemView disconnected unexpectedly.
* Default
* 1: Enabled
*/
#ifndef SEGGER_SYSVIEW_CAN_RESTART
#define SEGGER_SYSVIEW_CAN_RESTART 1
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_START_ON_INIT
*
* Description
* Enable calling SEGGER_SYSVIEW_Start() after initialization.
* Default
* 0: Disabled.
* Notes
* Convenience define to be used by SEGGER_SYSVIEW_Conf(),
* such as in embOS configuration.
*/
#ifndef SEGGER_SYSVIEW_START_ON_INIT
#define SEGGER_SYSVIEW_START_ON_INIT 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_USE_STATIC_BUFFER
*
* Description
* If enabled, use a static buffer instead of a buffer on the stack
* for SystemView event packets.
* Default
* 1: Enabled.
* Notes
* If enabled, the static memory use by SystemView is increased by
* the maximum packet size. SystemView is locked on entry of a
* recording function.
* If disabled, the stack usage by SystemView recording functions
* might be increased by up to the maximum packet size. SystemView
* is locked when writing the packet to the RTT buffer.
*/
#ifndef SEGGER_SYSVIEW_USE_STATIC_BUFFER
#define SEGGER_SYSVIEW_USE_STATIC_BUFFER 1
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_MAX_PACKET_SIZE
*
* Description
* Maximum packet size for a SystemView event.
* Default
* Automatically calculated.
* Notes
* The maximum packet size is mainly defined by the maximum string
* length and the maximum number of arguments.
*/
#ifndef SEGGER_SYSVIEW_MAX_PACKET_SIZE
#define SEGGER_SYSVIEW_MAX_PACKET_SIZE (SEGGER_SYSVIEW_INFO_SIZE + SEGGER_SYSVIEW_MAX_STRING_LEN + 2 * SEGGER_SYSVIEW_QUANTA_U32 + SEGGER_SYSVIEW_MAX_ARGUMENTS * SEGGER_SYSVIEW_QUANTA_U32)
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_POST_MORTEM_MODE
*
* Description
* If enabled, SystemView records for post-mortem analysis instead
* of real-time analysis.
* Default
* 0: Disabled.
* Notes
* For more information refer to
* https://www.segger.com/products/development-tools/systemview/technology/post-mortem-mode
*/
#ifndef SEGGER_SYSVIEW_POST_MORTEM_MODE
#define SEGGER_SYSVIEW_POST_MORTEM_MODE 0
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_SYNC_PERIOD_SHIFT
*
* Description
* Configure how frequently syncronization is sent in post-mortem
* mode.
* Default
* 8: (1 << 8) = Every 256 Events.
* Notes
* In post-mortem mode, at least one sync has to be in the RTT buffer.
* Recommended sync frequency: Buffer Size / 16
* For more information refer to
* https://www.segger.com/products/development-tools/systemview/technology/post-mortem-mode
*/
#ifndef SEGGER_SYSVIEW_SYNC_PERIOD_SHIFT
#define SEGGER_SYSVIEW_SYNC_PERIOD_SHIFT 8
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_ON_EVENT_RECORDED()
*
* Description
* Function macro to notify recorder about a new event in buffer.
* Default
* undefined: Do not notify recorder.
* Notes
* Used for non-J-Link recorder,
* such as to enable transmission via UART or notify IP task.
*/
#ifndef SEGGER_SYSVIEW_ON_EVENT_RECORDED
#define SEGGER_SYSVIEW_ON_EVENT_RECORDED(NumBytes)
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_LOCK()
*
* Description
* Function macro to (nestable) lock SystemView recording.
* Default
* Use RTT Locking mechanism (defined by SEGGER_RTT_LOCK()).
* Notes
* If SystemView recording is not locked, recording events from
* interrupts and tasks may lead to unpredictable, undefined, event
* data.
*/
#ifndef SEGGER_SYSVIEW_LOCK
#define SEGGER_SYSVIEW_LOCK() SEGGER_RTT_LOCK()
#endif
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_UNLOCK
*
* Description
* Function macro to unlock SystemView recording.
* Default
* Use RTT Unlocking mechanism (defined by SEGGER_RTT_UNLOCK()).
*/
#ifndef SEGGER_SYSVIEW_UNLOCK
#define SEGGER_SYSVIEW_UNLOCK() SEGGER_RTT_UNLOCK()
#endif
#ifdef __cplusplus
}
#endif
#endif
/*************************** End of file ****************************/

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@@ -0,0 +1,99 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER SystemView * Real-time application analysis *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the SystemView and RTT protocol, and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW_Int.h
Purpose : SEGGER SystemView internal header.
Revision: $Rev: 21281 $
*/
#ifndef SEGGER_SYSVIEW_INT_H
#define SEGGER_SYSVIEW_INT_H
/*********************************************************************
*
* #include Section
*
**********************************************************************
*/
#include "SEGGER_SYSVIEW.h"
#ifdef __cplusplus
extern "C" {
#endif
/*********************************************************************
*
* Private data types
*
**********************************************************************
*/
//
// Commands that Host can send to target
//
typedef enum {
SEGGER_SYSVIEW_COMMAND_ID_START = 1,
SEGGER_SYSVIEW_COMMAND_ID_STOP,
SEGGER_SYSVIEW_COMMAND_ID_GET_SYSTIME,
SEGGER_SYSVIEW_COMMAND_ID_GET_TASKLIST,
SEGGER_SYSVIEW_COMMAND_ID_GET_SYSDESC,
SEGGER_SYSVIEW_COMMAND_ID_GET_NUMMODULES,
SEGGER_SYSVIEW_COMMAND_ID_GET_MODULEDESC,
SEGGER_SYSVIEW_COMMAND_ID_HEARTBEAT = 127,
// Extended commands: Commands >= 128 have a second parameter
SEGGER_SYSVIEW_COMMAND_ID_GET_MODULE = 128
} SEGGER_SYSVIEW_COMMAND_ID;
#ifdef __cplusplus
}
#endif
#endif
/*************************** End of file ****************************/

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@@ -0,0 +1,34 @@
#include "bsp_log.h"
#include "SEGGER_RTT.h"
#include "SEGGER_RTT_Conf.h"
#include <stdio.h>
void BSPLogInit()
{
SEGGER_RTT_Init();
}
int PrintLog(const char *fmt, ...)
{
va_list args;
va_start(args, fmt);
int n = SEGGER_RTT_vprintf(BUFFER_INDEX, fmt, &args); // 一次可以开启多个buffer(多个终端),我们只用一个
va_end(args);
return n;
}
void Float2Str(char *str, float va)
{
int flag = va < 0;
int head = (int) va;
int point = (int) ((va - head) * 1000);
head = abs(head);
point = abs(point);
if (flag)
sprintf(str, "-%d.%d", head, point);
else
sprintf(str, "%d.%d", head, point);
}

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@@ -0,0 +1,72 @@
#ifndef _BSP_LOG_H
#define _BSP_LOG_H
#include "SEGGER_RTT.h"
#include "SEGGER_RTT_Conf.h"
#include <stdio.h>
#define BUFFER_INDEX 0
/**
* @brief 日志系统初始化
*
*/
void BSPLogInit();
/**
* @brief 日志功能原型,供下面的LOGI,LOGW,LOGE等使用
*
*/
#define LOG_PROTO(type, color, format, ...) \
SEGGER_RTT_printf(BUFFER_INDEX, " %s%s" format "\r\n%s", \
color, \
type, \
##__VA_ARGS__, \
RTT_CTRL_RESET)
/*----------------------------------------下面是日志输出的接口-------------------------------------------------*/
/* 清屏 */
#define LOG_CLEAR() SEGGER_RTT_WriteString(0, " " RTT_CTRL_CLEAR)
/* 无颜色日志输出 */
#define LOG(format, ...) LOG_PROTO("", "", format, ##__VA_ARGS__)
/**
* 有颜色格式日志输出,建议使用这些宏来输出日志
* @attention 注意这些接口不支持浮点格式化输出,若有需要,请使用Float2Str()函数进行转换后再打印
* @note 在release版本上车使用时,与makefile中添加的宏DISABLE_LOG_SYSTEM一起使用,可以关闭日志系统
*/
#if DISABLE_LOG_SYSTEM
#define LOGINFO(format, ...)
#define LOGWARNING(format, ...)
#define LOGERROR(format, ...)
#else
// information level
#define LOGINFO(format, ...) LOG_PROTO("I:", RTT_CTRL_TEXT_BRIGHT_GREEN, format, ##__VA_ARGS__)
// warning level
#define LOGWARNING(format, ...) LOG_PROTO("W:", RTT_CTRL_TEXT_BRIGHT_YELLOW, format, ##__VA_ARGS__)
// error level
#define LOGERROR(format, ...) LOG_PROTO("E:", RTT_CTRL_TEXT_BRIGHT_RED, format, ##__VA_ARGS__)
#endif // DISABLE_LOG_SYSTEM
/**
* @brief 通过segger RTT打印日志,支持格式化输出,格式化输出的实现参考printf.
* @attention !! 此函数不支持浮点格式化,若有需要,请使用Float2Str()函数进行转换后再打印 !!
*
* @param fmt 格式字符串
* @param ... 参数列表
* @return int 打印的log字符数
*/
int PrintLog(const char *fmt, ...);
/**
* @brief 利用sprintf(),将float转换为字符串进行打印
* @attention 浮点数需要转换为字符串后才能通过RTT打印
*
* @param str 转换后的字符串
* @param va 待转换的float
*/
void Float2Str(char *str, float va);
#endif

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@@ -0,0 +1,51 @@
# bsp_log
## 使用说明
bsp_log是基于segger RTT实现的日志打印模块。
推荐使用`bsp_log.h`中提供了三级日志:
```c
#define LOGINFO(format,...)
#define LOGWARNING(format,...)
#define LOGERROR(format,...)
```
分别用于输出不同等级的日志。注意RTT不支持直接使用`%f`进行浮点格式化,要使用`void Float2Str(char *str, float va);`
转化成字符串之后再发送。
**若想启用RTT必须通过`launch.json`的`debug-jlink`启动调试(不论使用什么调试器)。** 按照`VSCode+Ozone环境配置`完成配置之后的cmsis
dap和daplink是可以支持Jlink全家桶的。
另外若你使用的是cmsis-dap和daplink**请在 *jlink* 调试任务启动之后再打开`log`任务。**
(均在项目文件夹下的.vsocde/task.json中有注释自行查看。否则可能出线RTT viewer无法连接客户端的情况。
在ozone中查看log输出直接打开console调试任务台和terminal调试中断便可看到调试输出。
> 由于ozone版本的原因可能出现日志不换行或没有颜色。
## 自定义输出
你也可以自定义输出格式详见Segger RTT的文档。
```c
int printf_log(const char *fmt, ...);
void Float2Str(char *str, float va); // 输出浮点需要先用此函数进行转换
```
调用第一个函数可以通过jlink或dap-link向调试器连接的上位机发送信息格式和printf相同示例如下
```c
printf_log("Hello World!\n");
printf_log("Motor %d met some problem, error code %d!\n",3,1);
```
第二个函数可以将浮点类型转换成字符串以方便发送:
```c
float current_feedback=114.514;
char* str_buff[64];
Float2Str(str_buff,current_feedback);
printf_log("Motor %d met some problem, error code %d!\n",3,1);
```

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